packet.hh (7636:59b6a1b5bb0c) | packet.hh (7669:cc222ba29079) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * Copyright (c) 2010 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 76 unchanged lines hidden (view full) --- 85 SCUpgradeReq, // Special "weak" upgrade for StoreCond 86 UpgradeResp, 87 SCUpgradeFailReq, // Failed SCUpgradeReq in MSHR (never sent) 88 UpgradeFailResp, // Valid for SCUpgradeReq only 89 ReadExReq, 90 ReadExResp, 91 LoadLockedReq, 92 StoreCondReq, | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * Copyright (c) 2010 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 76 unchanged lines hidden (view full) --- 85 SCUpgradeReq, // Special "weak" upgrade for StoreCond 86 UpgradeResp, 87 SCUpgradeFailReq, // Failed SCUpgradeReq in MSHR (never sent) 88 UpgradeFailResp, // Valid for SCUpgradeReq only 89 ReadExReq, 90 ReadExResp, 91 LoadLockedReq, 92 StoreCondReq, |
93 StoreCondFailReq, // Failed StoreCondReq in MSHR (never sent) |
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93 StoreCondResp, 94 SwapReq, 95 SwapResp, 96 MessageReq, 97 MessageResp, 98 // Error responses 99 // @TODO these should be classified as responses rather than 100 // requests; coding them as requests initially for backwards --- 714 unchanged lines hidden --- | 94 StoreCondResp, 95 SwapReq, 96 SwapResp, 97 MessageReq, 98 MessageResp, 99 // Error responses 100 // @TODO these should be classified as responses rather than 101 // requests; coding them as requests initially for backwards --- 714 unchanged lines hidden --- |