packet.hh (4489:381fcb5b6c31) | packet.hh (4610:97834b18a8b4) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 29 unchanged lines hidden (view full) --- 38#ifndef __MEM_PACKET_HH__ 39#define __MEM_PACKET_HH__ 40 41#include <cassert> 42#include <list> 43#include <bitset> 44 45#include "base/compiler.hh" | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 29 unchanged lines hidden (view full) --- 38#ifndef __MEM_PACKET_HH__ 39#define __MEM_PACKET_HH__ 40 41#include <cassert> 42#include <list> 43#include <bitset> 44 45#include "base/compiler.hh" |
46#include "base/fast_alloc.hh" |
|
46#include "base/misc.hh" 47#include "mem/request.hh" 48#include "sim/host.hh" 49#include "sim/core.hh" 50 51 52struct Packet; 53typedef Packet *PacketPtr; --- 123 unchanged lines hidden (view full) --- 177 178/** 179 * A Packet is used to encapsulate a transfer between two objects in 180 * the memory system (e.g., the L1 and L2 cache). (In contrast, a 181 * single Request travels all the way from the requester to the 182 * ultimate destination and back, possibly being conveyed by several 183 * different Packets along the way.) 184 */ | 47#include "base/misc.hh" 48#include "mem/request.hh" 49#include "sim/host.hh" 50#include "sim/core.hh" 51 52 53struct Packet; 54typedef Packet *PacketPtr; --- 123 unchanged lines hidden (view full) --- 178 179/** 180 * A Packet is used to encapsulate a transfer between two objects in 181 * the memory system (e.g., the L1 and L2 cache). (In contrast, a 182 * single Request travels all the way from the requester to the 183 * ultimate destination and back, possibly being conveyed by several 184 * different Packets along the way.) 185 */ |
185class Packet | 186class Packet : public FastAlloc |
186{ 187 public: 188 189 typedef MemCmd::Command Command; 190 191 /** Temporary FLAGS field until cache gets working, this should be in coherence/sender state. */ 192 uint64_t flags; 193 --- 58 unchanged lines hidden (view full) --- 252 static const short Broadcast = -1; 253 254 /** A pointer to the original request. */ 255 RequestPtr req; 256 257 /** A virtual base opaque structure used to hold coherence-related 258 * state. A specific subclass would be derived from this to 259 * carry state specific to a particular coherence protocol. */ | 187{ 188 public: 189 190 typedef MemCmd::Command Command; 191 192 /** Temporary FLAGS field until cache gets working, this should be in coherence/sender state. */ 193 uint64_t flags; 194 --- 58 unchanged lines hidden (view full) --- 253 static const short Broadcast = -1; 254 255 /** A pointer to the original request. */ 256 RequestPtr req; 257 258 /** A virtual base opaque structure used to hold coherence-related 259 * state. A specific subclass would be derived from this to 260 * carry state specific to a particular coherence protocol. */ |
260 class CoherenceState { | 261 class CoherenceState : public FastAlloc { |
261 public: 262 virtual ~CoherenceState() {} 263 }; 264 265 /** This packet's coherence state. Caches should use 266 * dynamic_cast<> to cast to the state appropriate for the 267 * system's coherence protocol. */ 268 CoherenceState *coherence; 269 270 /** A virtual base opaque structure used to hold state associated 271 * with the packet but specific to the sending device (e.g., an 272 * MSHR). A pointer to this state is returned in the packet's 273 * response so that the sender can quickly look up the state 274 * needed to process it. A specific subclass would be derived 275 * from this to carry state specific to a particular sending 276 * device. */ | 262 public: 263 virtual ~CoherenceState() {} 264 }; 265 266 /** This packet's coherence state. Caches should use 267 * dynamic_cast<> to cast to the state appropriate for the 268 * system's coherence protocol. */ 269 CoherenceState *coherence; 270 271 /** A virtual base opaque structure used to hold state associated 272 * with the packet but specific to the sending device (e.g., an 273 * MSHR). A pointer to this state is returned in the packet's 274 * response so that the sender can quickly look up the state 275 * needed to process it. A specific subclass would be derived 276 * from this to carry state specific to a particular sending 277 * device. */ |
277 class SenderState { | 278 class SenderState : public FastAlloc { |
278 public: 279 virtual ~SenderState() {} 280 }; 281 282 /** This packet's sender state. Devices should use dynamic_cast<> 283 * to cast to the state appropriate to the sender. */ 284 SenderState *senderState; 285 --- 241 unchanged lines hidden --- | 279 public: 280 virtual ~SenderState() {} 281 }; 282 283 /** This packet's sender state. Devices should use dynamic_cast<> 284 * to cast to the state appropriate to the sender. */ 285 SenderState *senderState; 286 --- 241 unchanged lines hidden --- |