packet.hh (11294:a368064a2ab5) packet.hh (11306:a5340a2a24f9)
1/*
2 * Copyright (c) 2012-2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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656
657 bool isSecure() const
658 {
659 assert(flags.isSet(VALID_ADDR));
660 return _isSecure;
661 }
662
663 /**
1/*
2 * Copyright (c) 2012-2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 647 unchanged lines hidden (view full) ---

656
657 bool isSecure() const
658 {
659 assert(flags.isSet(VALID_ADDR));
660 return _isSecure;
661 }
662
663 /**
664 * Accessor function to atomic op.
665 */
666 AtomicOpFunctor *getAtomicOp() const { return req->getAtomicOpFunctor(); }
667 bool isAtomicOp() const { return req->isAtomic(); }
668
669 /**
664 * It has been determined that the SC packet should successfully update
665 * memory. Therefore, convert this SC packet to a normal write.
666 */
667 void
668 convertScToWrite()
669 {
670 assert(isLLSC());
671 assert(isWrite());

--- 507 unchanged lines hidden --- 		670 * It has been determined that the SC packet should successfully update
671 * memory. Therefore, convert this SC packet to a normal write.
672 */
673 void
674 convertScToWrite()
675 {
676 assert(isLLSC());
677 assert(isWrite());

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