packet.cc (11199:929fd978ab4e) packet.cc (11256:65db40192591)
1/*
2 * Copyright (c) 2011-2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Ali Saidi
42 * Steve Reinhardt
43 */
44
45/**
46 * @file
47 * Definition of the Packet Class, a packet is a transaction occuring
48 * between a single level of the memory heirarchy (ie L1->L2).
49 */
50
51#include <cstring>
52#include <iostream>
53
54#include "base/cprintf.hh"
55#include "base/misc.hh"
56#include "base/trace.hh"
57#include "mem/packet.hh"
58
59using namespace std;
60
61// The one downside to bitsets is that static initializers can get ugly.
62#define SET1(a1) (1 << (a1))
63#define SET2(a1, a2) (SET1(a1) | SET1(a2))
64#define SET3(a1, a2, a3) (SET2(a1, a2) | SET1(a3))
65#define SET4(a1, a2, a3, a4) (SET3(a1, a2, a3) | SET1(a4))
66#define SET5(a1, a2, a3, a4, a5) (SET4(a1, a2, a3, a4) | SET1(a5))
67#define SET6(a1, a2, a3, a4, a5, a6) (SET5(a1, a2, a3, a4, a5) | SET1(a6))
68
69const MemCmd::CommandInfo
70MemCmd::commandInfo[] =
71{
72 /* InvalidCmd */
73 { 0, InvalidCmd, "InvalidCmd" },
74 /* ReadReq - Read issued by a non-caching agent such as a CPU or
75 * device, with no restrictions on alignment. */
76 { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadReq" },
77 /* ReadResp */
78 { SET3(IsRead, IsResponse, HasData), InvalidCmd, "ReadResp" },
79 /* ReadRespWithInvalidate */
80 { SET4(IsRead, IsResponse, HasData, IsInvalidate),
81 InvalidCmd, "ReadRespWithInvalidate" },
82 /* WriteReq */
83 { SET5(IsWrite, NeedsExclusive, IsRequest, NeedsResponse, HasData),
84 WriteResp, "WriteReq" },
85 /* WriteResp */
86 { SET3(IsWrite, NeedsExclusive, IsResponse), InvalidCmd, "WriteResp" },
87 /* WritebackDirty */
88 { SET4(IsWrite, IsRequest, IsEviction, HasData),
89 InvalidCmd, "WritebackDirty" },
90 /* WritebackClean - This allows the upstream cache to writeback a
91 * line to the downstream cache without it being considered
92 * dirty. */
93 { SET4(IsWrite, IsRequest, IsEviction, HasData),
94 InvalidCmd, "WritebackClean" },
95 /* CleanEvict */
96 { SET2(IsRequest, IsEviction), InvalidCmd, "CleanEvict" },
97 /* SoftPFReq */
98 { SET4(IsRead, IsRequest, IsSWPrefetch, NeedsResponse),
99 SoftPFResp, "SoftPFReq" },
100 /* HardPFReq */
101 { SET4(IsRead, IsRequest, IsHWPrefetch, NeedsResponse),
102 HardPFResp, "HardPFReq" },
103 /* SoftPFResp */
104 { SET4(IsRead, IsResponse, IsSWPrefetch, HasData),
105 InvalidCmd, "SoftPFResp" },
106 /* HardPFResp */
107 { SET4(IsRead, IsResponse, IsHWPrefetch, HasData),
108 InvalidCmd, "HardPFResp" },
109 /* WriteLineReq */
110 { SET5(IsWrite, NeedsExclusive, IsRequest, NeedsResponse, HasData),
111 WriteResp, "WriteLineReq" },
112 /* UpgradeReq */
113 { SET5(IsInvalidate, NeedsExclusive, IsUpgrade, IsRequest, NeedsResponse),
114 UpgradeResp, "UpgradeReq" },
115 /* SCUpgradeReq: response could be UpgradeResp or UpgradeFailResp */
116 { SET6(IsInvalidate, NeedsExclusive, IsUpgrade, IsLlsc,
117 IsRequest, NeedsResponse),
118 UpgradeResp, "SCUpgradeReq" },
119 /* UpgradeResp */
120 { SET3(NeedsExclusive, IsUpgrade, IsResponse),
121 InvalidCmd, "UpgradeResp" },
122 /* SCUpgradeFailReq: generates UpgradeFailResp but still gets the data */
123 { SET6(IsRead, NeedsExclusive, IsInvalidate,
124 IsLlsc, IsRequest, NeedsResponse),
125 UpgradeFailResp, "SCUpgradeFailReq" },
126 /* UpgradeFailResp - Behaves like a ReadExReq, but notifies an SC
127 * that it has failed, acquires line as Dirty*/
128 { SET4(IsRead, NeedsExclusive, IsResponse, HasData),
129 InvalidCmd, "UpgradeFailResp" },
130 /* ReadExReq - Read issues by a cache, always cache-line aligned,
131 * and the response is guaranteed to be writeable (exclusive or
132 * even modified) */
133 { SET5(IsRead, NeedsExclusive, IsInvalidate, IsRequest, NeedsResponse),
134 ReadExResp, "ReadExReq" },
135 /* ReadExResp - Response matching a read exclusive, as we check
136 * the need for exclusive also on responses */
137 { SET4(IsRead, NeedsExclusive, IsResponse, HasData),
138 InvalidCmd, "ReadExResp" },
139 /* ReadCleanReq - Read issued by a cache, always cache-line
140 * aligned, and the response is guaranteed to not contain dirty data
141 * (exclusive or shared).*/
142 { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadCleanReq" },
143 /* ReadSharedReq - Read issued by a cache, always cache-line
144 * aligned, response is shared, possibly exclusive, owned or even
145 * modified. */
146 { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadSharedReq" },
147 /* LoadLockedReq: note that we use plain ReadResp as response, so that
148 * we can also use ReadRespWithInvalidate when needed */
149 { SET4(IsRead, IsLlsc, IsRequest, NeedsResponse),
150 ReadResp, "LoadLockedReq" },
151 /* StoreCondReq */
152 { SET6(IsWrite, NeedsExclusive, IsLlsc,
153 IsRequest, NeedsResponse, HasData),
154 StoreCondResp, "StoreCondReq" },
155 /* StoreCondFailReq: generates failing StoreCondResp */
156 { SET6(IsWrite, NeedsExclusive, IsLlsc,
157 IsRequest, NeedsResponse, HasData),
158 StoreCondResp, "StoreCondFailReq" },
159 /* StoreCondResp */
160 { SET4(IsWrite, NeedsExclusive, IsLlsc, IsResponse),
161 InvalidCmd, "StoreCondResp" },
162 /* SwapReq -- for Swap ldstub type operations */
163 { SET6(IsRead, IsWrite, NeedsExclusive, IsRequest, HasData, NeedsResponse),
164 SwapResp, "SwapReq" },
165 /* SwapResp -- for Swap ldstub type operations */
166 { SET5(IsRead, IsWrite, NeedsExclusive, IsResponse, HasData),
167 InvalidCmd, "SwapResp" },
168 /* IntReq -- for interrupts */
169 { SET4(IsWrite, IsRequest, NeedsResponse, HasData),
170 MessageResp, "MessageReq" },
171 /* IntResp -- for interrupts */
172 { SET2(IsWrite, IsResponse), InvalidCmd, "MessageResp" },
1/*
2 * Copyright (c) 2011-2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Ali Saidi
42 * Steve Reinhardt
43 */
44
45/**
46 * @file
47 * Definition of the Packet Class, a packet is a transaction occuring
48 * between a single level of the memory heirarchy (ie L1->L2).
49 */
50
51#include <cstring>
52#include <iostream>
53
54#include "base/cprintf.hh"
55#include "base/misc.hh"
56#include "base/trace.hh"
57#include "mem/packet.hh"
58
59using namespace std;
60
61// The one downside to bitsets is that static initializers can get ugly.
62#define SET1(a1) (1 << (a1))
63#define SET2(a1, a2) (SET1(a1) | SET1(a2))
64#define SET3(a1, a2, a3) (SET2(a1, a2) | SET1(a3))
65#define SET4(a1, a2, a3, a4) (SET3(a1, a2, a3) | SET1(a4))
66#define SET5(a1, a2, a3, a4, a5) (SET4(a1, a2, a3, a4) | SET1(a5))
67#define SET6(a1, a2, a3, a4, a5, a6) (SET5(a1, a2, a3, a4, a5) | SET1(a6))
68
69const MemCmd::CommandInfo
70MemCmd::commandInfo[] =
71{
72 /* InvalidCmd */
73 { 0, InvalidCmd, "InvalidCmd" },
74 /* ReadReq - Read issued by a non-caching agent such as a CPU or
75 * device, with no restrictions on alignment. */
76 { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadReq" },
77 /* ReadResp */
78 { SET3(IsRead, IsResponse, HasData), InvalidCmd, "ReadResp" },
79 /* ReadRespWithInvalidate */
80 { SET4(IsRead, IsResponse, HasData, IsInvalidate),
81 InvalidCmd, "ReadRespWithInvalidate" },
82 /* WriteReq */
83 { SET5(IsWrite, NeedsExclusive, IsRequest, NeedsResponse, HasData),
84 WriteResp, "WriteReq" },
85 /* WriteResp */
86 { SET3(IsWrite, NeedsExclusive, IsResponse), InvalidCmd, "WriteResp" },
87 /* WritebackDirty */
88 { SET4(IsWrite, IsRequest, IsEviction, HasData),
89 InvalidCmd, "WritebackDirty" },
90 /* WritebackClean - This allows the upstream cache to writeback a
91 * line to the downstream cache without it being considered
92 * dirty. */
93 { SET4(IsWrite, IsRequest, IsEviction, HasData),
94 InvalidCmd, "WritebackClean" },
95 /* CleanEvict */
96 { SET2(IsRequest, IsEviction), InvalidCmd, "CleanEvict" },
97 /* SoftPFReq */
98 { SET4(IsRead, IsRequest, IsSWPrefetch, NeedsResponse),
99 SoftPFResp, "SoftPFReq" },
100 /* HardPFReq */
101 { SET4(IsRead, IsRequest, IsHWPrefetch, NeedsResponse),
102 HardPFResp, "HardPFReq" },
103 /* SoftPFResp */
104 { SET4(IsRead, IsResponse, IsSWPrefetch, HasData),
105 InvalidCmd, "SoftPFResp" },
106 /* HardPFResp */
107 { SET4(IsRead, IsResponse, IsHWPrefetch, HasData),
108 InvalidCmd, "HardPFResp" },
109 /* WriteLineReq */
110 { SET5(IsWrite, NeedsExclusive, IsRequest, NeedsResponse, HasData),
111 WriteResp, "WriteLineReq" },
112 /* UpgradeReq */
113 { SET5(IsInvalidate, NeedsExclusive, IsUpgrade, IsRequest, NeedsResponse),
114 UpgradeResp, "UpgradeReq" },
115 /* SCUpgradeReq: response could be UpgradeResp or UpgradeFailResp */
116 { SET6(IsInvalidate, NeedsExclusive, IsUpgrade, IsLlsc,
117 IsRequest, NeedsResponse),
118 UpgradeResp, "SCUpgradeReq" },
119 /* UpgradeResp */
120 { SET3(NeedsExclusive, IsUpgrade, IsResponse),
121 InvalidCmd, "UpgradeResp" },
122 /* SCUpgradeFailReq: generates UpgradeFailResp but still gets the data */
123 { SET6(IsRead, NeedsExclusive, IsInvalidate,
124 IsLlsc, IsRequest, NeedsResponse),
125 UpgradeFailResp, "SCUpgradeFailReq" },
126 /* UpgradeFailResp - Behaves like a ReadExReq, but notifies an SC
127 * that it has failed, acquires line as Dirty*/
128 { SET4(IsRead, NeedsExclusive, IsResponse, HasData),
129 InvalidCmd, "UpgradeFailResp" },
130 /* ReadExReq - Read issues by a cache, always cache-line aligned,
131 * and the response is guaranteed to be writeable (exclusive or
132 * even modified) */
133 { SET5(IsRead, NeedsExclusive, IsInvalidate, IsRequest, NeedsResponse),
134 ReadExResp, "ReadExReq" },
135 /* ReadExResp - Response matching a read exclusive, as we check
136 * the need for exclusive also on responses */
137 { SET4(IsRead, NeedsExclusive, IsResponse, HasData),
138 InvalidCmd, "ReadExResp" },
139 /* ReadCleanReq - Read issued by a cache, always cache-line
140 * aligned, and the response is guaranteed to not contain dirty data
141 * (exclusive or shared).*/
142 { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadCleanReq" },
143 /* ReadSharedReq - Read issued by a cache, always cache-line
144 * aligned, response is shared, possibly exclusive, owned or even
145 * modified. */
146 { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadSharedReq" },
147 /* LoadLockedReq: note that we use plain ReadResp as response, so that
148 * we can also use ReadRespWithInvalidate when needed */
149 { SET4(IsRead, IsLlsc, IsRequest, NeedsResponse),
150 ReadResp, "LoadLockedReq" },
151 /* StoreCondReq */
152 { SET6(IsWrite, NeedsExclusive, IsLlsc,
153 IsRequest, NeedsResponse, HasData),
154 StoreCondResp, "StoreCondReq" },
155 /* StoreCondFailReq: generates failing StoreCondResp */
156 { SET6(IsWrite, NeedsExclusive, IsLlsc,
157 IsRequest, NeedsResponse, HasData),
158 StoreCondResp, "StoreCondFailReq" },
159 /* StoreCondResp */
160 { SET4(IsWrite, NeedsExclusive, IsLlsc, IsResponse),
161 InvalidCmd, "StoreCondResp" },
162 /* SwapReq -- for Swap ldstub type operations */
163 { SET6(IsRead, IsWrite, NeedsExclusive, IsRequest, HasData, NeedsResponse),
164 SwapResp, "SwapReq" },
165 /* SwapResp -- for Swap ldstub type operations */
166 { SET5(IsRead, IsWrite, NeedsExclusive, IsResponse, HasData),
167 InvalidCmd, "SwapResp" },
168 /* IntReq -- for interrupts */
169 { SET4(IsWrite, IsRequest, NeedsResponse, HasData),
170 MessageResp, "MessageReq" },
171 /* IntResp -- for interrupts */
172 { SET2(IsWrite, IsResponse), InvalidCmd, "MessageResp" },
173 /* ReleaseReq -- for release synchronization */
174 { SET2(IsRequest, NeedsResponse), ReleaseResp, "ReleaseReq" },
175 /* ReleaseResp -- for release synchronization */
176 { SET1(IsResponse), InvalidCmd, "ReleaseResp" },
177 /* AcquireReq -- for release synchronization */
178 { SET2(IsRequest, NeedsResponse), AcquireResp, "AcquireReq" },
179 /* AcquireResp -- for release synchronization */
180 { SET2(IsResponse, NeedsResponse), InvalidCmd, "AcquireResp" },
173 /* MemFenceReq -- for synchronization requests */
174 {SET2(IsRequest, NeedsResponse), MemFenceResp, "MemFenceReq"},
175 /* MemFenceResp -- for synchronization responses */
176 {SET1(IsResponse), InvalidCmd, "MemFenceResp"},
181 /* InvalidDestError -- packet dest field invalid */
182 { SET2(IsResponse, IsError), InvalidCmd, "InvalidDestError" },
183 /* BadAddressError -- memory address invalid */
184 { SET2(IsResponse, IsError), InvalidCmd, "BadAddressError" },
185 /* FunctionalReadError */
186 { SET3(IsRead, IsResponse, IsError), InvalidCmd, "FunctionalReadError" },
187 /* FunctionalWriteError */
188 { SET3(IsWrite, IsResponse, IsError), InvalidCmd, "FunctionalWriteError" },
189 /* PrintReq */
190 { SET2(IsRequest, IsPrint), InvalidCmd, "PrintReq" },
191 /* Flush Request */
192 { SET3(IsRequest, IsFlush, NeedsExclusive), InvalidCmd, "FlushReq" },
193 /* Invalidation Request */
194 { SET4(IsInvalidate, IsRequest, NeedsExclusive, NeedsResponse),
195 InvalidateResp, "InvalidateReq" },
196 /* Invalidation Response */
197 { SET3(IsInvalidate, IsResponse, NeedsExclusive),
198 InvalidCmd, "InvalidateResp" }
199};
200
201bool
202Packet::checkFunctional(Printable *obj, Addr addr, bool is_secure, int size,
203 uint8_t *_data)
204{
205 Addr func_start = getAddr();
206 Addr func_end = getAddr() + getSize() - 1;
207 Addr val_start = addr;
208 Addr val_end = val_start + size - 1;
209
210 if (is_secure != _isSecure || func_start > val_end ||
211 val_start > func_end) {
212 // no intersection
213 return false;
214 }
215
216 // check print first since it doesn't require data
217 if (isPrint()) {
218 assert(!_data);
219 safe_cast<PrintReqState*>(senderState)->printObj(obj);
220 return false;
221 }
222
223 // we allow the caller to pass NULL to signify the other packet
224 // has no data
225 if (!_data) {
226 return false;
227 }
228
229 // offset of functional request into supplied value (could be
230 // negative if partial overlap)
231 int offset = func_start - val_start;
232
233 if (isRead()) {
234 if (func_start >= val_start && func_end <= val_end) {
235 memcpy(getPtr<uint8_t>(), _data + offset, getSize());
236 if (bytesValid.empty())
237 bytesValid.resize(getSize(), true);
238 // complete overlap, and as the current packet is a read
239 // we are done
240 return true;
241 } else {
242 // Offsets and sizes to copy in case of partial overlap
243 int func_offset;
244 int val_offset;
245 int overlap_size;
246
247 // calculate offsets and copy sizes for the two byte arrays
248 if (val_start < func_start && val_end <= func_end) {
249 // the one we are checking against starts before and
250 // ends before or the same
251 val_offset = func_start - val_start;
252 func_offset = 0;
253 overlap_size = val_end - func_start;
254 } else if (val_start >= func_start && val_end > func_end) {
255 // the one we are checking against starts after or the
256 // same, and ends after
257 val_offset = 0;
258 func_offset = val_start - func_start;
259 overlap_size = func_end - val_start;
260 } else if (val_start >= func_start && val_end <= func_end) {
261 // the one we are checking against is completely
262 // subsumed in the current packet, possibly starting
263 // and ending at the same address
264 val_offset = 0;
265 func_offset = val_start - func_start;
266 overlap_size = size;
267 } else if (val_start < func_start && val_end > func_end) {
268 // the current packet is completely subsumed in the
269 // one we are checking against
270 val_offset = func_start - val_start;
271 func_offset = 0;
272 overlap_size = func_end - func_start;
273 } else {
274 panic("Missed a case for checkFunctional with "
275 " %s 0x%x size %d, against 0x%x size %d\n",
276 cmdString(), getAddr(), getSize(), addr, size);
277 }
278
279 // copy partial data into the packet's data array
280 uint8_t *dest = getPtr<uint8_t>() + func_offset;
281 uint8_t *src = _data + val_offset;
282 memcpy(dest, src, overlap_size);
283
284 // initialise the tracking of valid bytes if we have not
285 // used it already
286 if (bytesValid.empty())
287 bytesValid.resize(getSize(), false);
288
289 // track if we are done filling the functional access
290 bool all_bytes_valid = true;
291
292 int i = 0;
293
294 // check up to func_offset
295 for (; all_bytes_valid && i < func_offset; ++i)
296 all_bytes_valid &= bytesValid[i];
297
298 // update the valid bytes
299 for (i = func_offset; i < func_offset + overlap_size; ++i)
300 bytesValid[i] = true;
301
302 // check the bit after the update we just made
303 for (; all_bytes_valid && i < getSize(); ++i)
304 all_bytes_valid &= bytesValid[i];
305
306 return all_bytes_valid;
307 }
308 } else if (isWrite()) {
309 if (offset >= 0) {
310 memcpy(_data + offset, getConstPtr<uint8_t>(),
311 (min(func_end, val_end) - func_start) + 1);
312 } else {
313 // val_start > func_start
314 memcpy(_data, getConstPtr<uint8_t>() - offset,
315 (min(func_end, val_end) - val_start) + 1);
316 }
317 } else {
318 panic("Don't know how to handle command %s\n", cmdString());
319 }
320
321 // keep going with request by default
322 return false;
323}
324
325void
326Packet::pushSenderState(Packet::SenderState *sender_state)
327{
328 assert(sender_state != NULL);
329 sender_state->predecessor = senderState;
330 senderState = sender_state;
331}
332
333Packet::SenderState *
334Packet::popSenderState()
335{
336 assert(senderState != NULL);
337 SenderState *sender_state = senderState;
338 senderState = sender_state->predecessor;
339 sender_state->predecessor = NULL;
340 return sender_state;
341}
342
343void
344Packet::print(ostream &o, const int verbosity, const string &prefix) const
345{
346 ccprintf(o, "%s[%x:%x] %s\n", prefix,
347 getAddr(), getAddr() + getSize() - 1, cmdString());
348}
349
350std::string
351Packet::print() const {
352 ostringstream str;
353 print(str);
354 return str.str();
355}
356
357Packet::PrintReqState::PrintReqState(ostream &_os, int _verbosity)
358 : curPrefixPtr(new string("")), os(_os), verbosity(_verbosity)
359{
360 labelStack.push_back(LabelStackEntry("", curPrefixPtr));
361}
362
363Packet::PrintReqState::~PrintReqState()
364{
365 labelStack.pop_back();
366 assert(labelStack.empty());
367 delete curPrefixPtr;
368}
369
370Packet::PrintReqState::
371LabelStackEntry::LabelStackEntry(const string &_label, string *_prefix)
372 : label(_label), prefix(_prefix), labelPrinted(false)
373{
374}
375
376void
377Packet::PrintReqState::pushLabel(const string &lbl, const string &prefix)
378{
379 labelStack.push_back(LabelStackEntry(lbl, curPrefixPtr));
380 curPrefixPtr = new string(*curPrefixPtr);
381 *curPrefixPtr += prefix;
382}
383
384void
385Packet::PrintReqState::popLabel()
386{
387 delete curPrefixPtr;
388 curPrefixPtr = labelStack.back().prefix;
389 labelStack.pop_back();
390 assert(!labelStack.empty());
391}
392
393void
394Packet::PrintReqState::printLabels()
395{
396 if (!labelStack.back().labelPrinted) {
397 LabelStack::iterator i = labelStack.begin();
398 LabelStack::iterator end = labelStack.end();
399 while (i != end) {
400 if (!i->labelPrinted) {
401 ccprintf(os, "%s%s\n", *(i->prefix), i->label);
402 i->labelPrinted = true;
403 }
404 i++;
405 }
406 }
407}
408
409
410void
411Packet::PrintReqState::printObj(Printable *obj)
412{
413 printLabels();
414 obj->print(os, verbosity, curPrefix());
415}
177 /* InvalidDestError -- packet dest field invalid */
178 { SET2(IsResponse, IsError), InvalidCmd, "InvalidDestError" },
179 /* BadAddressError -- memory address invalid */
180 { SET2(IsResponse, IsError), InvalidCmd, "BadAddressError" },
181 /* FunctionalReadError */
182 { SET3(IsRead, IsResponse, IsError), InvalidCmd, "FunctionalReadError" },
183 /* FunctionalWriteError */
184 { SET3(IsWrite, IsResponse, IsError), InvalidCmd, "FunctionalWriteError" },
185 /* PrintReq */
186 { SET2(IsRequest, IsPrint), InvalidCmd, "PrintReq" },
187 /* Flush Request */
188 { SET3(IsRequest, IsFlush, NeedsExclusive), InvalidCmd, "FlushReq" },
189 /* Invalidation Request */
190 { SET4(IsInvalidate, IsRequest, NeedsExclusive, NeedsResponse),
191 InvalidateResp, "InvalidateReq" },
192 /* Invalidation Response */
193 { SET3(IsInvalidate, IsResponse, NeedsExclusive),
194 InvalidCmd, "InvalidateResp" }
195};
196
197bool
198Packet::checkFunctional(Printable *obj, Addr addr, bool is_secure, int size,
199 uint8_t *_data)
200{
201 Addr func_start = getAddr();
202 Addr func_end = getAddr() + getSize() - 1;
203 Addr val_start = addr;
204 Addr val_end = val_start + size - 1;
205
206 if (is_secure != _isSecure || func_start > val_end ||
207 val_start > func_end) {
208 // no intersection
209 return false;
210 }
211
212 // check print first since it doesn't require data
213 if (isPrint()) {
214 assert(!_data);
215 safe_cast<PrintReqState*>(senderState)->printObj(obj);
216 return false;
217 }
218
219 // we allow the caller to pass NULL to signify the other packet
220 // has no data
221 if (!_data) {
222 return false;
223 }
224
225 // offset of functional request into supplied value (could be
226 // negative if partial overlap)
227 int offset = func_start - val_start;
228
229 if (isRead()) {
230 if (func_start >= val_start && func_end <= val_end) {
231 memcpy(getPtr<uint8_t>(), _data + offset, getSize());
232 if (bytesValid.empty())
233 bytesValid.resize(getSize(), true);
234 // complete overlap, and as the current packet is a read
235 // we are done
236 return true;
237 } else {
238 // Offsets and sizes to copy in case of partial overlap
239 int func_offset;
240 int val_offset;
241 int overlap_size;
242
243 // calculate offsets and copy sizes for the two byte arrays
244 if (val_start < func_start && val_end <= func_end) {
245 // the one we are checking against starts before and
246 // ends before or the same
247 val_offset = func_start - val_start;
248 func_offset = 0;
249 overlap_size = val_end - func_start;
250 } else if (val_start >= func_start && val_end > func_end) {
251 // the one we are checking against starts after or the
252 // same, and ends after
253 val_offset = 0;
254 func_offset = val_start - func_start;
255 overlap_size = func_end - val_start;
256 } else if (val_start >= func_start && val_end <= func_end) {
257 // the one we are checking against is completely
258 // subsumed in the current packet, possibly starting
259 // and ending at the same address
260 val_offset = 0;
261 func_offset = val_start - func_start;
262 overlap_size = size;
263 } else if (val_start < func_start && val_end > func_end) {
264 // the current packet is completely subsumed in the
265 // one we are checking against
266 val_offset = func_start - val_start;
267 func_offset = 0;
268 overlap_size = func_end - func_start;
269 } else {
270 panic("Missed a case for checkFunctional with "
271 " %s 0x%x size %d, against 0x%x size %d\n",
272 cmdString(), getAddr(), getSize(), addr, size);
273 }
274
275 // copy partial data into the packet's data array
276 uint8_t *dest = getPtr<uint8_t>() + func_offset;
277 uint8_t *src = _data + val_offset;
278 memcpy(dest, src, overlap_size);
279
280 // initialise the tracking of valid bytes if we have not
281 // used it already
282 if (bytesValid.empty())
283 bytesValid.resize(getSize(), false);
284
285 // track if we are done filling the functional access
286 bool all_bytes_valid = true;
287
288 int i = 0;
289
290 // check up to func_offset
291 for (; all_bytes_valid && i < func_offset; ++i)
292 all_bytes_valid &= bytesValid[i];
293
294 // update the valid bytes
295 for (i = func_offset; i < func_offset + overlap_size; ++i)
296 bytesValid[i] = true;
297
298 // check the bit after the update we just made
299 for (; all_bytes_valid && i < getSize(); ++i)
300 all_bytes_valid &= bytesValid[i];
301
302 return all_bytes_valid;
303 }
304 } else if (isWrite()) {
305 if (offset >= 0) {
306 memcpy(_data + offset, getConstPtr<uint8_t>(),
307 (min(func_end, val_end) - func_start) + 1);
308 } else {
309 // val_start > func_start
310 memcpy(_data, getConstPtr<uint8_t>() - offset,
311 (min(func_end, val_end) - val_start) + 1);
312 }
313 } else {
314 panic("Don't know how to handle command %s\n", cmdString());
315 }
316
317 // keep going with request by default
318 return false;
319}
320
321void
322Packet::pushSenderState(Packet::SenderState *sender_state)
323{
324 assert(sender_state != NULL);
325 sender_state->predecessor = senderState;
326 senderState = sender_state;
327}
328
329Packet::SenderState *
330Packet::popSenderState()
331{
332 assert(senderState != NULL);
333 SenderState *sender_state = senderState;
334 senderState = sender_state->predecessor;
335 sender_state->predecessor = NULL;
336 return sender_state;
337}
338
339void
340Packet::print(ostream &o, const int verbosity, const string &prefix) const
341{
342 ccprintf(o, "%s[%x:%x] %s\n", prefix,
343 getAddr(), getAddr() + getSize() - 1, cmdString());
344}
345
346std::string
347Packet::print() const {
348 ostringstream str;
349 print(str);
350 return str.str();
351}
352
353Packet::PrintReqState::PrintReqState(ostream &_os, int _verbosity)
354 : curPrefixPtr(new string("")), os(_os), verbosity(_verbosity)
355{
356 labelStack.push_back(LabelStackEntry("", curPrefixPtr));
357}
358
359Packet::PrintReqState::~PrintReqState()
360{
361 labelStack.pop_back();
362 assert(labelStack.empty());
363 delete curPrefixPtr;
364}
365
366Packet::PrintReqState::
367LabelStackEntry::LabelStackEntry(const string &_label, string *_prefix)
368 : label(_label), prefix(_prefix), labelPrinted(false)
369{
370}
371
372void
373Packet::PrintReqState::pushLabel(const string &lbl, const string &prefix)
374{
375 labelStack.push_back(LabelStackEntry(lbl, curPrefixPtr));
376 curPrefixPtr = new string(*curPrefixPtr);
377 *curPrefixPtr += prefix;
378}
379
380void
381Packet::PrintReqState::popLabel()
382{
383 delete curPrefixPtr;
384 curPrefixPtr = labelStack.back().prefix;
385 labelStack.pop_back();
386 assert(!labelStack.empty());
387}
388
389void
390Packet::PrintReqState::printLabels()
391{
392 if (!labelStack.back().labelPrinted) {
393 LabelStack::iterator i = labelStack.begin();
394 LabelStack::iterator end = labelStack.end();
395 while (i != end) {
396 if (!i->labelPrinted) {
397 ccprintf(os, "%s%s\n", *(i->prefix), i->label);
398 i->labelPrinted = true;
399 }
400 i++;
401 }
402 }
403}
404
405
406void
407Packet::PrintReqState::printObj(Printable *obj)
408{
409 printLabels();
410 obj->print(os, verbosity, curPrefix());
411}