noncoherent_xbar.cc (10912:b99a6662d7c2) | noncoherent_xbar.cc (11284:b3926db25371) |
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1/* 2 * Copyright (c) 2011-2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 128 unchanged lines hidden (view full) --- 137 calcPacketTiming(pkt, xbar_delay); 138 139 // determine how long to be crossbar layer is busy 140 Tick packetFinishTime = clockEdge(Cycles(1)) + pkt->payloadDelay; 141 142 // before forwarding the packet (and possibly altering it), 143 // remember if we are expecting a response 144 const bool expect_response = pkt->needsResponse() && | 1/* 2 * Copyright (c) 2011-2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 128 unchanged lines hidden (view full) --- 137 calcPacketTiming(pkt, xbar_delay); 138 139 // determine how long to be crossbar layer is busy 140 Tick packetFinishTime = clockEdge(Cycles(1)) + pkt->payloadDelay; 141 142 // before forwarding the packet (and possibly altering it), 143 // remember if we are expecting a response 144 const bool expect_response = pkt->needsResponse() && |
145 !pkt->memInhibitAsserted(); | 145 !pkt->cacheResponding(); |
146 147 // since it is a normal request, attempt to send the packet 148 bool success = masterPorts[master_port_id]->sendTimingReq(pkt); 149 150 if (!success) { | 146 147 // since it is a normal request, attempt to send the packet 148 bool success = masterPorts[master_port_id]->sendTimingReq(pkt); 149 150 if (!success) { |
151 // inhibited packets should never be forced to retry 152 assert(!pkt->memInhibitAsserted()); 153 | |
154 DPRINTF(NoncoherentXBar, "recvTimingReq: src %s %s 0x%x RETRY\n", 155 src_port->name(), pkt->cmdString(), pkt->getAddr()); 156 157 // restore the header delay as it is additive 158 pkt->headerDelay = old_header_delay; 159 160 // occupy until the header is sent 161 reqLayers[master_port_id]->failedTiming(src_port, --- 170 unchanged lines hidden --- | 151 DPRINTF(NoncoherentXBar, "recvTimingReq: src %s %s 0x%x RETRY\n", 152 src_port->name(), pkt->cmdString(), pkt->getAddr()); 153 154 // restore the header delay as it is additive 155 pkt->headerDelay = old_header_delay; 156 157 // occupy until the header is sent 158 reqLayers[master_port_id]->failedTiming(src_port, --- 170 unchanged lines hidden --- |