mem_delay.cc (13784:1941dc118243) mem_delay.cc (13892:0182a0601f66)
1/*
2 * Copyright (c) 2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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38 */
39
40#include "mem/mem_delay.hh"
41
42#include "params/MemDelay.hh"
43#include "params/SimpleMemDelay.hh"
44
45MemDelay::MemDelay(const MemDelayParams *p)
1/*
2 * Copyright (c) 2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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38 */
39
40#include "mem/mem_delay.hh"
41
42#include "params/MemDelay.hh"
43#include "params/SimpleMemDelay.hh"
44
45MemDelay::MemDelay(const MemDelayParams *p)
46 : MemObject(p),
46 : ClockedObject(p),
47 masterPort(name() + "-master", *this),
48 slavePort(name() + "-slave", *this),
49 reqQueue(*this, masterPort),
50 respQueue(*this, slavePort),
51 snoopRespQueue(*this, masterPort)
52{
53}
54

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63Port &
64MemDelay::getPort(const std::string &if_name, PortID idx)
65{
66 if (if_name == "master") {
67 return masterPort;
68 } else if (if_name == "slave") {
69 return slavePort;
70 } else {
47 masterPort(name() + "-master", *this),
48 slavePort(name() + "-slave", *this),
49 reqQueue(*this, masterPort),
50 respQueue(*this, slavePort),
51 snoopRespQueue(*this, masterPort)
52{
53}
54

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63Port &
64MemDelay::getPort(const std::string &if_name, PortID idx)
65{
66 if (if_name == "master") {
67 return masterPort;
68 } else if (if_name == "slave") {
69 return slavePort;
70 } else {
71 return MemObject::getPort(if_name, idx);
71 return ClockedObject::getPort(if_name, idx);
72 }
73}
74
75bool
76MemDelay::trySatisfyFunctional(PacketPtr pkt)
77{
78 return slavePort.trySatisfyFunctional(pkt) ||
79 masterPort.trySatisfyFunctional(pkt);

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73}
74
75bool
76MemDelay::trySatisfyFunctional(PacketPtr pkt)
77{
78 return slavePort.trySatisfyFunctional(pkt) ||
79 masterPort.trySatisfyFunctional(pkt);

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