mem_delay.cc (12802:c861c5743fc0) | mem_delay.cc (12823:ba630bc7a36d) |
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1/* 2 * Copyright (c) 2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 67 unchanged lines hidden (view full) --- 76 if (if_name == "slave") { 77 return slavePort; 78 } else { 79 return MemObject::getSlavePort(if_name, idx); 80 } 81} 82 83bool | 1/* 2 * Copyright (c) 2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 67 unchanged lines hidden (view full) --- 76 if (if_name == "slave") { 77 return slavePort; 78 } else { 79 return MemObject::getSlavePort(if_name, idx); 80 } 81} 82 83bool |
84MemDelay::checkFunctional(PacketPtr pkt) | 84MemDelay::trySatisfyFunctional(PacketPtr pkt) |
85{ | 85{ |
86 return slavePort.checkFunctional(pkt) || 87 masterPort.checkFunctional(pkt); | 86 return slavePort.trySatisfyFunctional(pkt) || 87 masterPort.trySatisfyFunctional(pkt); |
88} 89 90MemDelay::MasterPort::MasterPort(const std::string &_name, MemDelay &_parent) 91 : QueuedMasterPort(_name, &_parent, 92 _parent.reqQueue, _parent.snoopRespQueue), 93 parent(_parent) 94{ 95} --- 6 unchanged lines hidden (view full) --- 102 parent.slavePort.schedTimingResp(pkt, when); 103 104 return true; 105} 106 107void 108MemDelay::MasterPort::recvFunctionalSnoop(PacketPtr pkt) 109{ | 88} 89 90MemDelay::MasterPort::MasterPort(const std::string &_name, MemDelay &_parent) 91 : QueuedMasterPort(_name, &_parent, 92 _parent.reqQueue, _parent.snoopRespQueue), 93 parent(_parent) 94{ 95} --- 6 unchanged lines hidden (view full) --- 102 parent.slavePort.schedTimingResp(pkt, when); 103 104 return true; 105} 106 107void 108MemDelay::MasterPort::recvFunctionalSnoop(PacketPtr pkt) 109{ |
110 if (parent.checkFunctional(pkt)) { | 110 if (parent.trySatisfyFunctional(pkt)) { |
111 pkt->makeResponse(); 112 } else { 113 parent.slavePort.sendFunctionalSnoop(pkt); 114 } 115} 116 117Tick 118MemDelay::MasterPort::recvAtomicSnoop(PacketPtr pkt) --- 32 unchanged lines hidden (view full) --- 151 parent.masterPort.schedTimingReq(pkt, when); 152 153 return true; 154} 155 156void 157MemDelay::SlavePort::recvFunctional(PacketPtr pkt) 158{ | 111 pkt->makeResponse(); 112 } else { 113 parent.slavePort.sendFunctionalSnoop(pkt); 114 } 115} 116 117Tick 118MemDelay::MasterPort::recvAtomicSnoop(PacketPtr pkt) --- 32 unchanged lines hidden (view full) --- 151 parent.masterPort.schedTimingReq(pkt, when); 152 153 return true; 154} 155 156void 157MemDelay::SlavePort::recvFunctional(PacketPtr pkt) 158{ |
159 if (parent.checkFunctional(pkt)) { | 159 if (parent.trySatisfyFunctional(pkt)) { |
160 pkt->makeResponse(); 161 } else { 162 parent.masterPort.sendFunctional(pkt); 163 } 164} 165 166bool 167MemDelay::SlavePort::recvTimingSnoopResp(PacketPtr pkt) --- 49 unchanged lines hidden --- | 160 pkt->makeResponse(); 161 } else { 162 parent.masterPort.sendFunctional(pkt); 163 } 164} 165 166bool 167MemDelay::SlavePort::recvTimingSnoopResp(PacketPtr pkt) --- 49 unchanged lines hidden --- |