fs_translating_port_proxy.cc (12532:a86ce386add1) | fs_translating_port_proxy.cc (12637:bfc3cb9c7e6c) |
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1/* 2 * Copyright (c) 2011,2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 40 unchanged lines hidden (view full) --- 49#include "mem/fs_translating_port_proxy.hh" 50 51#include "arch/vtophys.hh" 52#include "base/chunk_generator.hh" 53#include "cpu/base.hh" 54#include "cpu/thread_context.hh" 55#include "sim/system.hh" 56 | 1/* 2 * Copyright (c) 2011,2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 40 unchanged lines hidden (view full) --- 49#include "mem/fs_translating_port_proxy.hh" 50 51#include "arch/vtophys.hh" 52#include "base/chunk_generator.hh" 53#include "cpu/base.hh" 54#include "cpu/thread_context.hh" 55#include "sim/system.hh" 56 |
57using namespace TheISA; 58 | |
59FSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc) 60 : PortProxy(tc->getCpuPtr()->getDataPort(), 61 tc->getSystemPtr()->cacheLineSize()), _tc(tc) 62{ 63} 64 65FSTranslatingPortProxy::FSTranslatingPortProxy(MasterPort &port, 66 unsigned int cacheLineSize) --- 101 unchanged lines hidden --- | 57FSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc) 58 : PortProxy(tc->getCpuPtr()->getDataPort(), 59 tc->getSystemPtr()->cacheLineSize()), _tc(tc) 60{ 61} 62 63FSTranslatingPortProxy::FSTranslatingPortProxy(MasterPort &port, 64 unsigned int cacheLineSize) --- 101 unchanged lines hidden --- |