1/*
2 * Copyright (c) 2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 * Andreas Hansson
42 */
43
44/**
45 * @file
46 * Port object definitions.
47 */
48
49#include "base/chunk_generator.hh"
50#include "cpu/base.hh"
51#include "cpu/thread_context.hh"
52#include "mem/fs_translating_port_proxy.hh"
53
54using namespace TheISA;
55
56FSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc)
57 : PortProxy(tc->getCpuPtr()->getDataPort()), _tc(tc)
58{
59}
60
61FSTranslatingPortProxy::FSTranslatingPortProxy(Port &port)
62 : PortProxy(port), _tc(NULL)
63{
64}
65
66FSTranslatingPortProxy::~FSTranslatingPortProxy()
67{
68}
69
70void
| 1/*
2 * Copyright (c) 2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 * Andreas Hansson
42 */
43
44/**
45 * @file
46 * Port object definitions.
47 */
48
49#include "base/chunk_generator.hh"
50#include "cpu/base.hh"
51#include "cpu/thread_context.hh"
52#include "mem/fs_translating_port_proxy.hh"
53
54using namespace TheISA;
55
56FSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc)
57 : PortProxy(tc->getCpuPtr()->getDataPort()), _tc(tc)
58{
59}
60
61FSTranslatingPortProxy::FSTranslatingPortProxy(Port &port)
62 : PortProxy(port), _tc(NULL)
63{
64}
65
66FSTranslatingPortProxy::~FSTranslatingPortProxy()
67{
68}
69
70void
|
71FSTranslatingPortProxy::readBlob(Addr addr, uint8_t *p, int size)
| 71FSTranslatingPortProxy::readBlob(Addr addr, uint8_t *p, int size) const
|
72{
73 Addr paddr;
74 for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done();
75 gen.next())
76 {
77 if (_tc)
78 paddr = TheISA::vtophys(_tc,gen.addr());
79 else
80 paddr = TheISA::vtophys(gen.addr());
81
82 PortProxy::readBlob(paddr, p, gen.size());
83 p += gen.size();
84 }
85}
86
87void
| 72{
73 Addr paddr;
74 for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done();
75 gen.next())
76 {
77 if (_tc)
78 paddr = TheISA::vtophys(_tc,gen.addr());
79 else
80 paddr = TheISA::vtophys(gen.addr());
81
82 PortProxy::readBlob(paddr, p, gen.size());
83 p += gen.size();
84 }
85}
86
87void
|
88FSTranslatingPortProxy::writeBlob(Addr addr, uint8_t *p, int size)
| 88FSTranslatingPortProxy::writeBlob(Addr addr, uint8_t *p, int size) const
|
89{
90 Addr paddr;
91 for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done();
92 gen.next())
93 {
94 if (_tc)
95 paddr = TheISA::vtophys(_tc,gen.addr());
96 else
97 paddr = TheISA::vtophys(gen.addr());
98
99 PortProxy::writeBlob(paddr, p, gen.size());
100 p += gen.size();
101 }
102}
103
104void
| 89{
90 Addr paddr;
91 for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done();
92 gen.next())
93 {
94 if (_tc)
95 paddr = TheISA::vtophys(_tc,gen.addr());
96 else
97 paddr = TheISA::vtophys(gen.addr());
98
99 PortProxy::writeBlob(paddr, p, gen.size());
100 p += gen.size();
101 }
102}
103
104void
|
105FSTranslatingPortProxy::memsetBlob(Addr address, uint8_t v, int size)
| 105FSTranslatingPortProxy::memsetBlob(Addr address, uint8_t v, int size) const
|
106{
107 Addr paddr;
108 for (ChunkGenerator gen(address, size, TheISA::PageBytes); !gen.done();
109 gen.next())
110 {
111 if (_tc)
112 paddr = TheISA::vtophys(_tc,gen.addr());
113 else
114 paddr = TheISA::vtophys(gen.addr());
115
116 PortProxy::memsetBlob(paddr, v, gen.size());
117 }
118}
119
120void
121CopyOut(ThreadContext *tc, void *dest, Addr src, size_t cplen)
122{
123 uint8_t *dst = (uint8_t *)dest;
124 tc->getVirtProxy().readBlob(src, dst, cplen);
125}
126
127void
128CopyIn(ThreadContext *tc, Addr dest, void *source, size_t cplen)
129{
130 uint8_t *src = (uint8_t *)source;
131 tc->getVirtProxy().writeBlob(dest, src, cplen);
132}
133
134void
135CopyStringOut(ThreadContext *tc, char *dst, Addr vaddr, size_t maxlen)
136{
137 char *start = dst;
138 FSTranslatingPortProxy &vp = tc->getVirtProxy();
139
140 bool foundNull = false;
141 while ((dst - start + 1) < maxlen && !foundNull) {
142 vp.readBlob(vaddr++, (uint8_t*)dst, 1);
143 if (dst == '\0')
144 foundNull = true;
145 dst++;
146 }
147
148 if (!foundNull)
149 *dst = '\0';
150}
151
152void
153CopyStringIn(ThreadContext *tc, char *src, Addr vaddr)
154{
155 FSTranslatingPortProxy &vp = tc->getVirtProxy();
156 for (ChunkGenerator gen(vaddr, strlen(src), TheISA::PageBytes); !gen.done();
157 gen.next())
158 {
159 vp.writeBlob(gen.addr(), (uint8_t*)src, gen.size());
160 src += gen.size();
161 }
162}
| 106{
107 Addr paddr;
108 for (ChunkGenerator gen(address, size, TheISA::PageBytes); !gen.done();
109 gen.next())
110 {
111 if (_tc)
112 paddr = TheISA::vtophys(_tc,gen.addr());
113 else
114 paddr = TheISA::vtophys(gen.addr());
115
116 PortProxy::memsetBlob(paddr, v, gen.size());
117 }
118}
119
120void
121CopyOut(ThreadContext *tc, void *dest, Addr src, size_t cplen)
122{
123 uint8_t *dst = (uint8_t *)dest;
124 tc->getVirtProxy().readBlob(src, dst, cplen);
125}
126
127void
128CopyIn(ThreadContext *tc, Addr dest, void *source, size_t cplen)
129{
130 uint8_t *src = (uint8_t *)source;
131 tc->getVirtProxy().writeBlob(dest, src, cplen);
132}
133
134void
135CopyStringOut(ThreadContext *tc, char *dst, Addr vaddr, size_t maxlen)
136{
137 char *start = dst;
138 FSTranslatingPortProxy &vp = tc->getVirtProxy();
139
140 bool foundNull = false;
141 while ((dst - start + 1) < maxlen && !foundNull) {
142 vp.readBlob(vaddr++, (uint8_t*)dst, 1);
143 if (dst == '\0')
144 foundNull = true;
145 dst++;
146 }
147
148 if (!foundNull)
149 *dst = '\0';
150}
151
152void
153CopyStringIn(ThreadContext *tc, char *src, Addr vaddr)
154{
155 FSTranslatingPortProxy &vp = tc->getVirtProxy();
156 for (ChunkGenerator gen(vaddr, strlen(src), TheISA::PageBytes); !gen.done();
157 gen.next())
158 {
159 vp.writeBlob(gen.addr(), (uint8_t*)src, gen.size());
160 src += gen.size();
161 }
162}
|