dramsim2.hh (10296:35738ad3c7c6) dramsim2.hh (10713:eddb533708cb)
1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 66 unchanged lines hidden (view full) ---

75 protected:
76
77 Tick recvAtomic(PacketPtr pkt);
78
79 void recvFunctional(PacketPtr pkt);
80
81 bool recvTimingReq(PacketPtr pkt);
82
1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 66 unchanged lines hidden (view full) ---

75 protected:
76
77 Tick recvAtomic(PacketPtr pkt);
78
79 void recvFunctional(PacketPtr pkt);
80
81 bool recvTimingReq(PacketPtr pkt);
82
83 void recvRetry();
83 void recvRespRetry();
84
85 AddrRangeList getAddrRanges() const;
86
87 };
88
89 MemoryPort port;
90
91 /**

--- 111 unchanged lines hidden (view full) ---

203 virtual void init();
204 virtual void startup();
205
206 protected:
207
208 Tick recvAtomic(PacketPtr pkt);
209 void recvFunctional(PacketPtr pkt);
210 bool recvTimingReq(PacketPtr pkt);
84
85 AddrRangeList getAddrRanges() const;
86
87 };
88
89 MemoryPort port;
90
91 /**

--- 111 unchanged lines hidden (view full) ---

203 virtual void init();
204 virtual void startup();
205
206 protected:
207
208 Tick recvAtomic(PacketPtr pkt);
209 void recvFunctional(PacketPtr pkt);
210 bool recvTimingReq(PacketPtr pkt);
211 void recvRetry();
211 void recvRespRetry();
212
213};
214
215#endif // __MEM_DRAMSIM2_HH__
212
213};
214
215#endif // __MEM_DRAMSIM2_HH__