dramsim2.cc (12084:5a3769ff3d55) | dramsim2.cc (12823:ba630bc7a36d) |
---|---|
1/* 2 * Copyright (c) 2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 155 unchanged lines hidden (view full) --- 164DRAMSim2::recvFunctional(PacketPtr pkt) 165{ 166 pkt->pushLabel(name()); 167 168 functionalAccess(pkt); 169 170 // potentially update the packets in our response queue as well 171 for (auto i = responseQueue.begin(); i != responseQueue.end(); ++i) | 1/* 2 * Copyright (c) 2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 155 unchanged lines hidden (view full) --- 164DRAMSim2::recvFunctional(PacketPtr pkt) 165{ 166 pkt->pushLabel(name()); 167 168 functionalAccess(pkt); 169 170 // potentially update the packets in our response queue as well 171 for (auto i = responseQueue.begin(); i != responseQueue.end(); ++i) |
172 pkt->checkFunctional(*i); | 172 pkt->trySatisfyFunctional(*i); |
173 174 pkt->popLabel(); 175} 176 177bool 178DRAMSim2::recvTimingReq(PacketPtr pkt) 179{ 180 // if a cache is responding, sink the packet without further action --- 219 unchanged lines hidden --- | 173 174 pkt->popLabel(); 175} 176 177bool 178DRAMSim2::recvTimingReq(PacketPtr pkt) 179{ 180 // if a cache is responding, sink the packet without further action --- 219 unchanged lines hidden --- |