dramsim2.cc (10921:07811efc0fde) | dramsim2.cc (11190:0964165d1857) |
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1/* 2 * Copyright (c) 2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 164 unchanged lines hidden (view full) --- 173} 174 175bool 176DRAMSim2::recvTimingReq(PacketPtr pkt) 177{ 178 // we should never see a new request while in retry 179 assert(!retryReq); 180 | 1/* 2 * Copyright (c) 2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 164 unchanged lines hidden (view full) --- 173} 174 175bool 176DRAMSim2::recvTimingReq(PacketPtr pkt) 177{ 178 // we should never see a new request while in retry 179 assert(!retryReq); 180 |
181 // @todo temporary hack to deal with memory corruption issues until 182 // 4-phase transactions are complete 183 for (int x = 0; x < pendingDelete.size(); x++) 184 delete pendingDelete[x]; 185 pendingDelete.clear(); 186 | |
187 if (pkt->memInhibitAsserted()) { 188 // snooper will supply based on copy of packet 189 // still target's responsibility to delete packet | 181 if (pkt->memInhibitAsserted()) { 182 // snooper will supply based on copy of packet 183 // still target's responsibility to delete packet |
190 pendingDelete.push_back(pkt); | 184 pendingDelete.reset(pkt); |
191 return true; 192 } 193 194 // if we cannot accept we need to send a retry once progress can 195 // be made 196 bool can_accept = nbrOutstanding() < wrapper.queueSize(); 197 198 // keep track of the transaction --- 77 unchanged lines hidden (view full) --- 276 // queue it to be sent back 277 responseQueue.push_back(pkt); 278 279 // if we are not already waiting for a retry, or are scheduled 280 // to send a response, schedule an event 281 if (!retryResp && !sendResponseEvent.scheduled()) 282 schedule(sendResponseEvent, time); 283 } else { | 185 return true; 186 } 187 188 // if we cannot accept we need to send a retry once progress can 189 // be made 190 bool can_accept = nbrOutstanding() < wrapper.queueSize(); 191 192 // keep track of the transaction --- 77 unchanged lines hidden (view full) --- 270 // queue it to be sent back 271 responseQueue.push_back(pkt); 272 273 // if we are not already waiting for a retry, or are scheduled 274 // to send a response, schedule an event 275 if (!retryResp && !sendResponseEvent.scheduled()) 276 schedule(sendResponseEvent, time); 277 } else { |
284 // @todo the packet is going to be deleted, and the DRAMPacket 285 // is still having a pointer to it 286 pendingDelete.push_back(pkt); | 278 // queue the packet for deletion 279 pendingDelete.reset(pkt); |
287 } 288} 289 290void DRAMSim2::readComplete(unsigned id, uint64_t addr, uint64_t cycle) 291{ 292 assert(cycle == divCeil(curTick() - startTick, 293 wrapper.clockPeriod() * SimClock::Int::ns)); 294 --- 108 unchanged lines hidden --- | 280 } 281} 282 283void DRAMSim2::readComplete(unsigned id, uint64_t addr, uint64_t cycle) 284{ 285 assert(cycle == divCeil(curTick() - startTick, 286 wrapper.clockPeriod() * SimClock::Int::ns)); 287 --- 108 unchanged lines hidden --- |