dram_ctrl.hh (10211:e084db2b1527) | dram_ctrl.hh (10212:acc1131e01d6) |
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1/* 2 * Copyright (c) 2012-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 472 unchanged lines hidden (view full) --- 481 const Tick tWTR; 482 const Tick tRTW; 483 const Tick tBURST; 484 const Tick tRCD; 485 const Tick tCL; 486 const Tick tRP; 487 const Tick tRAS; 488 const Tick tWR; | 1/* 2 * Copyright (c) 2012-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 472 unchanged lines hidden (view full) --- 481 const Tick tWTR; 482 const Tick tRTW; 483 const Tick tBURST; 484 const Tick tRCD; 485 const Tick tCL; 486 const Tick tRP; 487 const Tick tRAS; 488 const Tick tWR; |
489 const Tick tRTP; |
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489 const Tick tRFC; 490 const Tick tREFI; 491 const Tick tRRD; 492 const Tick tXAW; 493 const uint32_t activationLimit; 494 495 /** 496 * Memory controller configuration initialized based on parameter --- 203 unchanged lines hidden --- | 490 const Tick tRFC; 491 const Tick tREFI; 492 const Tick tRRD; 493 const Tick tXAW; 494 const uint32_t activationLimit; 495 496 /** 497 * Memory controller configuration initialized based on parameter --- 203 unchanged lines hidden --- |