1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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483 const uint32_t channels;
484 uint32_t rowsPerBank;
485 const uint32_t readBufferSize;
486 const uint32_t writeBufferSize;
487 const uint32_t writeHighThreshold;
488 const uint32_t writeLowThreshold;
489 const uint32_t minWritesPerSwitch;
490 uint32_t writesThisTime;
491
492 /**
493 * Basic memory timing parameters initialized based on parameter
494 * values.
495 */
496 const Tick tWTR;
497 const Tick tBURST;
498 const Tick tRCD;

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564 Stats::Scalar numRdRetry;
565 Stats::Scalar numWrRetry;
566 Stats::Scalar totGap;
567 Stats::Vector readPktSize;
568 Stats::Vector writePktSize;
569 Stats::Vector rdQLenPdf;
570 Stats::Vector wrQLenPdf;
571 Stats::Histogram bytesPerActivate;
572
573 // Latencies summed over all requests
574 Stats::Scalar totQLat;
575 Stats::Scalar totMemAccLat;
576 Stats::Scalar totBusLat;
577 Stats::Scalar totBankLat;
578
579 // Average latencies per request

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