dram_ctrl.cc (13834:1a7c647cbeac) dram_ctrl.cc (13857:9255d7412a58)
1/*
2 * Copyright (c) 2010-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 289 unchanged lines hidden (view full) ---

298 DPRINTF(DRAM, "Write queue limit %d, current size %d, entries needed %d\n",
299 writeBufferSize, totalWriteQueueSize, neededEntries);
300
301 auto wrsize_new = (totalWriteQueueSize + neededEntries);
302 return wrsize_new > writeBufferSize;
303}
304
305DRAMCtrl::DRAMPacket*
1/*
2 * Copyright (c) 2010-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 289 unchanged lines hidden (view full) ---

298 DPRINTF(DRAM, "Write queue limit %d, current size %d, entries needed %d\n",
299 writeBufferSize, totalWriteQueueSize, neededEntries);
300
301 auto wrsize_new = (totalWriteQueueSize + neededEntries);
302 return wrsize_new > writeBufferSize;
303}
304
305DRAMCtrl::DRAMPacket*
306DRAMCtrl::decodeAddr(PacketPtr pkt, Addr dramPktAddr, unsigned size,
307 bool isRead)
306DRAMCtrl::decodeAddr(const PacketPtr pkt, Addr dramPktAddr, unsigned size,
307 bool isRead) const
308{
309 // decode the address based on the address mapping scheme, with
310 // Ro, Ra, Co, Ba and Ch denoting row, rank, column, bank and
311 // channel, respectively
312 uint8_t rank;
313 uint8_t bank;
314 // use a 64-bit unsigned during the computations as the row is
315 // always the top bits, and check before creating the DRAMPacket

--- 2656 unchanged lines hidden ---
308{
309 // decode the address based on the address mapping scheme, with
310 // Ro, Ra, Co, Ba and Ch denoting row, rank, column, bank and
311 // channel, respectively
312 uint8_t rank;
313 uint8_t bank;
314 // use a 64-bit unsigned during the computations as the row is
315 // always the top bits, and check before creating the DRAMPacket

--- 2656 unchanged lines hidden ---