dram_ctrl.cc (10213:2e630c6c2042) | dram_ctrl.cc (10214:39eb5d4c400a) |
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1/* 2 * Copyright (c) 2010-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 836 unchanged lines hidden (view full) --- 845 assert(bank.openRow != Bank::NO_ROW); 846 847 // sample the bytes per activate here since we are closing 848 // the page 849 bytesPerActivate.sample(bank.bytesAccessed); 850 851 bank.openRow = Bank::NO_ROW; 852 | 1/* 2 * Copyright (c) 2010-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 836 unchanged lines hidden (view full) --- 845 assert(bank.openRow != Bank::NO_ROW); 846 847 // sample the bytes per activate here since we are closing 848 // the page 849 bytesPerActivate.sample(bank.bytesAccessed); 850 851 bank.openRow = Bank::NO_ROW; 852 |
853 // no precharge allowed before this one 854 bank.preAllowedAt = pre_at; 855 |
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853 Tick pre_done_at = pre_at + tRP; 854 855 bank.actAllowedAt = std::max(bank.actAllowedAt, pre_done_at); 856 857 assert(numBanksActive != 0); 858 --numBanksActive; 859 860 DPRINTF(DRAM, "Precharging bank at tick %lld, now got %d active\n", --- 439 unchanged lines hidden (view full) --- 1300 } 1301 } 1302 1303 // at this point, ensure that all banks are precharged 1304 if (refreshState == REF_PRE) { 1305 // precharge any active bank if we are not already in the idle 1306 // state 1307 if (pwrState != PWR_IDLE) { | 856 Tick pre_done_at = pre_at + tRP; 857 858 bank.actAllowedAt = std::max(bank.actAllowedAt, pre_done_at); 859 860 assert(numBanksActive != 0); 861 --numBanksActive; 862 863 DPRINTF(DRAM, "Precharging bank at tick %lld, now got %d active\n", --- 439 unchanged lines hidden (view full) --- 1303 } 1304 } 1305 1306 // at this point, ensure that all banks are precharged 1307 if (refreshState == REF_PRE) { 1308 // precharge any active bank if we are not already in the idle 1309 // state 1310 if (pwrState != PWR_IDLE) { |
1311 // at the moment, we use a precharge all even if there is 1312 // only a single bank open |
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1308 DPRINTF(DRAM, "Precharging all\n"); | 1313 DPRINTF(DRAM, "Precharging all\n"); |
1314 1315 // first determine when we can precharge 1316 Tick pre_at = curTick(); |
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1309 for (int i = 0; i < ranksPerChannel; i++) { 1310 for (int j = 0; j < banksPerRank; j++) { | 1317 for (int i = 0; i < ranksPerChannel; i++) { 1318 for (int j = 0; j < banksPerRank; j++) { |
1311 if (banks[i][j].openRow != Bank::NO_ROW) { 1312 // respect both causality and any existing bank 1313 // constraints 1314 Tick pre_at = std::max(banks[i][j].preAllowedAt, 1315 curTick()); | 1319 // respect both causality and any existing bank 1320 // constraints, some banks could already have a 1321 // (auto) precharge scheduled 1322 pre_at = std::max(banks[i][j].preAllowedAt, pre_at); 1323 } 1324 } |
1316 | 1325 |
1326 // make sure all banks are precharged, and for those that 1327 // already are, update their availability 1328 Tick act_allowed_at = pre_at + tRP; 1329 1330 for (int i = 0; i < ranksPerChannel; i++) { 1331 for (int j = 0; j < banksPerRank; j++) { 1332 if (banks[i][j].openRow != Bank::NO_ROW) { |
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1317 prechargeBank(banks[i][j], pre_at); | 1333 prechargeBank(banks[i][j], pre_at); |
1334 } else { 1335 banks[i][j].actAllowedAt = 1336 std::max(banks[i][j].actAllowedAt, act_allowed_at); 1337 banks[i][j].preAllowedAt = 1338 std::max(banks[i][j].preAllowedAt, pre_at); |
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1318 } 1319 } 1320 } 1321 } else { 1322 DPRINTF(DRAM, "All banks already precharged, starting refresh\n"); 1323 1324 // go ahead and kick the power state machine into gear if 1325 // we are already idle --- 482 unchanged lines hidden --- | 1339 } 1340 } 1341 } 1342 } else { 1343 DPRINTF(DRAM, "All banks already precharged, starting refresh\n"); 1344 1345 // go ahead and kick the power state machine into gear if 1346 // we are already idle --- 482 unchanged lines hidden --- |