1/* 2 * Copyright (c) 2010-2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 68 unchanged lines hidden (view full) --- 77 writeBufferSize(p->write_buffer_size), 78 writeHighThreshold(writeBufferSize * p->write_high_thresh_perc / 100.0), 79 writeLowThreshold(writeBufferSize * p->write_low_thresh_perc / 100.0), 80 minWritesPerSwitch(p->min_writes_per_switch), 81 writesThisTime(0), readsThisTime(0), 82 tCK(p->tCK), tWTR(p->tWTR), tRTW(p->tRTW), tCS(p->tCS), tBURST(p->tBURST), 83 tCCD_L(p->tCCD_L), tRCD(p->tRCD), tCL(p->tCL), tRP(p->tRP), tRAS(p->tRAS), 84 tWR(p->tWR), tRTP(p->tRTP), tRFC(p->tRFC), tREFI(p->tREFI), tRRD(p->tRRD), |
85 tRRD_L(p->tRRD_L), tXAW(p->tXAW), tXP(p->tXP), tXS(p->tXS), 86 activationLimit(p->activation_limit), |
87 memSchedPolicy(p->mem_sched_policy), addrMapping(p->addr_mapping), 88 pageMgmt(p->page_policy), 89 maxAccessesPerRow(p->max_accesses_per_row), 90 frontendLatency(p->static_frontend_latency), 91 backendLatency(p->static_backend_latency), 92 busBusyUntil(0), prevArrival(0), 93 nextReqTime(0), activeRank(0), timeStampOffset(0) 94{ --- 2151 unchanged lines hidden --- |