dram_ctrl.cc (13784:1941dc118243) | dram_ctrl.cc (13834:1a7c647cbeac) |
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1/* 2 * Copyright (c) 2010-2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 630 unchanged lines hidden (view full) --- 639 unsigned size = pkt->getSize(); 640 unsigned offset = pkt->getAddr() & (burstSize - 1); 641 unsigned int dram_pkt_count = divCeil(offset + size, burstSize); 642 643 // run the QoS scheduler and assign a QoS priority value to the packet 644 qosSchedule( { &readQueue, &writeQueue }, burstSize, pkt); 645 646 // check local buffers and do not accept if full | 1/* 2 * Copyright (c) 2010-2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 630 unchanged lines hidden (view full) --- 639 unsigned size = pkt->getSize(); 640 unsigned offset = pkt->getAddr() & (burstSize - 1); 641 unsigned int dram_pkt_count = divCeil(offset + size, burstSize); 642 643 // run the QoS scheduler and assign a QoS priority value to the packet 644 qosSchedule( { &readQueue, &writeQueue }, burstSize, pkt); 645 646 // check local buffers and do not accept if full |
647 if (pkt->isRead()) { | 647 if (pkt->isWrite()) { |
648 assert(size != 0); | 648 assert(size != 0); |
649 if (readQueueFull(dram_pkt_count)) { 650 DPRINTF(DRAM, "Read queue full, not accepting\n"); 651 // remember that we have to retry this port 652 retryRdReq = true; 653 numRdRetry++; 654 return false; 655 } else { 656 addToReadQueue(pkt, dram_pkt_count); 657 readReqs++; 658 bytesReadSys += size; 659 } 660 } else { 661 assert(pkt->isWrite()); 662 assert(size != 0); | |
663 if (writeQueueFull(dram_pkt_count)) { 664 DPRINTF(DRAM, "Write queue full, not accepting\n"); 665 // remember that we have to retry this port 666 retryWrReq = true; 667 numWrRetry++; 668 return false; 669 } else { 670 addToWriteQueue(pkt, dram_pkt_count); 671 writeReqs++; 672 bytesWrittenSys += size; 673 } | 649 if (writeQueueFull(dram_pkt_count)) { 650 DPRINTF(DRAM, "Write queue full, not accepting\n"); 651 // remember that we have to retry this port 652 retryWrReq = true; 653 numWrRetry++; 654 return false; 655 } else { 656 addToWriteQueue(pkt, dram_pkt_count); 657 writeReqs++; 658 bytesWrittenSys += size; 659 } |
660 } else { 661 assert(pkt->isRead()); 662 assert(size != 0); 663 if (readQueueFull(dram_pkt_count)) { 664 DPRINTF(DRAM, "Read queue full, not accepting\n"); 665 // remember that we have to retry this port 666 retryRdReq = true; 667 numRdRetry++; 668 return false; 669 } else { 670 addToReadQueue(pkt, dram_pkt_count); 671 readReqs++; 672 bytesReadSys += size; 673 } |
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674 } 675 676 return true; 677} 678 679void 680DRAMCtrl::processRespondEvent() 681{ --- 2290 unchanged lines hidden --- | 674 } 675 676 return true; 677} 678 679void 680DRAMCtrl::processRespondEvent() 681{ --- 2290 unchanged lines hidden --- |