dram_ctrl.cc (10216:52c869140fc2) | dram_ctrl.cc (10245:70333502b9b5) |
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1/* 2 * Copyright (c) 2010-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 201 unchanged lines hidden (view full) --- 210DRAMCtrl::decodeAddr(PacketPtr pkt, Addr dramPktAddr, unsigned size, 211 bool isRead) 212{ 213 // decode the address based on the address mapping scheme, with 214 // Ro, Ra, Co, Ba and Ch denoting row, rank, column, bank and 215 // channel, respectively 216 uint8_t rank; 217 uint8_t bank; | 1/* 2 * Copyright (c) 2010-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 201 unchanged lines hidden (view full) --- 210DRAMCtrl::decodeAddr(PacketPtr pkt, Addr dramPktAddr, unsigned size, 211 bool isRead) 212{ 213 // decode the address based on the address mapping scheme, with 214 // Ro, Ra, Co, Ba and Ch denoting row, rank, column, bank and 215 // channel, respectively 216 uint8_t rank; 217 uint8_t bank; |
218 uint16_t row; | 218 // use a 64-bit unsigned during the computations as the row is 219 // always the top bits, and check before creating the DRAMPacket 220 uint64_t row; |
219 220 // truncate the address to the access granularity 221 Addr addr = dramPktAddr / burstSize; 222 223 // we have removed the lowest order address bits that denote the 224 // position within the column 225 if (addrMapping == Enums::RoRaBaChCo) { 226 // the lowest order bits denote the column to ensure that --- 62 unchanged lines hidden (view full) --- 289 row = addr % rowsPerBank; 290 addr = addr / rowsPerBank; 291 } else 292 panic("Unknown address mapping policy chosen!"); 293 294 assert(rank < ranksPerChannel); 295 assert(bank < banksPerRank); 296 assert(row < rowsPerBank); | 221 222 // truncate the address to the access granularity 223 Addr addr = dramPktAddr / burstSize; 224 225 // we have removed the lowest order address bits that denote the 226 // position within the column 227 if (addrMapping == Enums::RoRaBaChCo) { 228 // the lowest order bits denote the column to ensure that --- 62 unchanged lines hidden (view full) --- 291 row = addr % rowsPerBank; 292 addr = addr / rowsPerBank; 293 } else 294 panic("Unknown address mapping policy chosen!"); 295 296 assert(rank < ranksPerChannel); 297 assert(bank < banksPerRank); 298 assert(row < rowsPerBank); |
299 assert(row < Bank::NO_ROW); |
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297 298 DPRINTF(DRAM, "Address: %lld Rank %d Bank %d Row %d\n", 299 dramPktAddr, rank, bank, row); 300 301 // create the corresponding DRAM packet with the entry time and 302 // ready time set to the current tick, the latter will be updated 303 // later 304 uint16_t bank_id = banksPerRank * rank + bank; --- 440 unchanged lines hidden (view full) --- 745 746 DPRINTF(DRAM, "Done\n"); 747 748 return; 749} 750 751void 752DRAMCtrl::activateBank(Tick act_tick, uint8_t rank, uint8_t bank, | 300 301 DPRINTF(DRAM, "Address: %lld Rank %d Bank %d Row %d\n", 302 dramPktAddr, rank, bank, row); 303 304 // create the corresponding DRAM packet with the entry time and 305 // ready time set to the current tick, the latter will be updated 306 // later 307 uint16_t bank_id = banksPerRank * rank + bank; --- 440 unchanged lines hidden (view full) --- 748 749 DPRINTF(DRAM, "Done\n"); 750 751 return; 752} 753 754void 755DRAMCtrl::activateBank(Tick act_tick, uint8_t rank, uint8_t bank, |
753 uint16_t row, Bank& bank_ref) | 756 uint32_t row, Bank& bank_ref) |
754{ 755 assert(0 <= rank && rank < ranksPerChannel); 756 assert(actTicks[rank].size() == activationLimit); 757 758 DPRINTF(DRAM, "Activate at tick %d\n", act_tick); 759 760 // update the open row 761 assert(bank_ref.openRow == Bank::NO_ROW); --- 1041 unchanged lines hidden --- | 757{ 758 assert(0 <= rank && rank < ranksPerChannel); 759 assert(actTicks[rank].size() == activationLimit); 760 761 DPRINTF(DRAM, "Activate at tick %d\n", act_tick); 762 763 // update the open row 764 assert(bank_ref.openRow == Bank::NO_ROW); --- 1041 unchanged lines hidden --- |