comm_monitor.hh (10902:36b9241fa027) comm_monitor.hh (10994:51ff41f6a4a5)
1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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41#ifndef __MEM_COMM_MONITOR_HH__
42#define __MEM_COMM_MONITOR_HH__
43
44#include "base/statistics.hh"
45#include "mem/mem_object.hh"
46#include "mem/stack_dist_calc.hh"
47#include "params/CommMonitor.hh"
48#include "proto/protoio.hh"
1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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41#ifndef __MEM_COMM_MONITOR_HH__
42#define __MEM_COMM_MONITOR_HH__
43
44#include "base/statistics.hh"
45#include "mem/mem_object.hh"
46#include "mem/stack_dist_calc.hh"
47#include "params/CommMonitor.hh"
48#include "proto/protoio.hh"
49#include "sim/probe/mem.hh"
49#include "sim/system.hh"
50
51/**
52 * The communication monitor is a MemObject which can monitor statistics of
53 * the communication happening between two ports in the memory system.
54 *
55 * Currently the following stats are implemented: Histograms of read/write
56 * transactions, read/write burst lengths, read/write bandwidth,

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77 CommMonitor(Params* params);
78
79 /** Destructor */
80 ~CommMonitor();
81
82 void init() M5_ATTR_OVERRIDE;
83 void regStats() M5_ATTR_OVERRIDE;
84 void startup() M5_ATTR_OVERRIDE;
50#include "sim/system.hh"
51
52/**
53 * The communication monitor is a MemObject which can monitor statistics of
54 * the communication happening between two ports in the memory system.
55 *
56 * Currently the following stats are implemented: Histograms of read/write
57 * transactions, read/write burst lengths, read/write bandwidth,

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78 CommMonitor(Params* params);
79
80 /** Destructor */
81 ~CommMonitor();
82
83 void init() M5_ATTR_OVERRIDE;
84 void regStats() M5_ATTR_OVERRIDE;
85 void startup() M5_ATTR_OVERRIDE;
86 void regProbePoints() M5_ATTR_OVERRIDE;
85
86 public: // MemObject interfaces
87 BaseMasterPort& getMasterPort(const std::string& if_name,
88 PortID idx = InvalidPortID) M5_ATTR_OVERRIDE;
89
90 BaseSlavePort& getSlavePort(const std::string& if_name,
91 PortID idx = InvalidPortID) M5_ATTR_OVERRIDE;
92

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423
424 /** @} */
425
426 /** Output stream for a potential trace. */
427 ProtoOutputStream *traceStream;
428
429 /** Instantiate stats */
430 MonitorStats stats;
87
88 public: // MemObject interfaces
89 BaseMasterPort& getMasterPort(const std::string& if_name,
90 PortID idx = InvalidPortID) M5_ATTR_OVERRIDE;
91
92 BaseSlavePort& getSlavePort(const std::string& if_name,
93 PortID idx = InvalidPortID) M5_ATTR_OVERRIDE;
94

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425
426 /** @} */
427
428 /** Output stream for a potential trace. */
429 ProtoOutputStream *traceStream;
430
431 /** Instantiate stats */
432 MonitorStats stats;
433
434 protected: // Probe points
435 /**
436 * @{
437 * @name Memory system probe points
438 */
439
440 /** Successfully forwarded request packet */
441 ProbePoints::PacketUPtr ppPktReq;
442
443 /** Successfully forwarded response packet */
444 ProbePoints::PacketUPtr ppPktResp;
445
446 /** @} */
431};
432
433#endif //__MEM_COMM_MONITOR_HH__
447};
448
449#endif //__MEM_COMM_MONITOR_HH__