1/*
2 * Copyright (c) 2012-2013, 2015, 2018 ARM Limited
3 * Copyright (c) 2016 Google Inc.
4 * Copyright (c) 2017, Centre National de la Recherche Scientifique
5 * All rights reserved.
6 *
7 * The license below extends only to copyright in the software and shall
8 * not be construed as granting a license to any other intellectual
9 * property including but not limited to intellectual property relating
10 * to a hardware implementation of the functionality of the software
11 * licensed hereunder. You may use the software subject to the license
12 * terms below provided that you ensure that this notice is replicated
13 * unmodified and in its entirety in all distributions of the software,
14 * modified or unmodified, in source code or in binary form.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions are
18 * met: redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer;
20 * redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution;
23 * neither the name of the copyright holders nor the names of its
24 * contributors may be used to endorse or promote products derived from
25 * this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 *
39 * Authors: Thomas Grass
40 * Andreas Hansson
41 * Rahul Thakur
42 * Pierre-Yves Peneau
43 */
44
45#ifndef __MEM_COMM_MONITOR_HH__
46#define __MEM_COMM_MONITOR_HH__
47
48#include "base/statistics.hh"
| 1/*
2 * Copyright (c) 2012-2013, 2015, 2018 ARM Limited
3 * Copyright (c) 2016 Google Inc.
4 * Copyright (c) 2017, Centre National de la Recherche Scientifique
5 * All rights reserved.
6 *
7 * The license below extends only to copyright in the software and shall
8 * not be construed as granting a license to any other intellectual
9 * property including but not limited to intellectual property relating
10 * to a hardware implementation of the functionality of the software
11 * licensed hereunder. You may use the software subject to the license
12 * terms below provided that you ensure that this notice is replicated
13 * unmodified and in its entirety in all distributions of the software,
14 * modified or unmodified, in source code or in binary form.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions are
18 * met: redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer;
20 * redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution;
23 * neither the name of the copyright holders nor the names of its
24 * contributors may be used to endorse or promote products derived from
25 * this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 *
39 * Authors: Thomas Grass
40 * Andreas Hansson
41 * Rahul Thakur
42 * Pierre-Yves Peneau
43 */
44
45#ifndef __MEM_COMM_MONITOR_HH__
46#define __MEM_COMM_MONITOR_HH__
47
48#include "base/statistics.hh"
|
49#include "mem/mem_object.hh"
| 49#include "mem/port.hh"
|
50#include "params/CommMonitor.hh"
51#include "sim/probe/mem.hh"
| 50#include "params/CommMonitor.hh"
51#include "sim/probe/mem.hh"
|
| 52#include "sim/sim_object.hh"
|
52
53/**
| 53
54/**
|
54 * The communication monitor is a MemObject which can monitor statistics of
| 55 * The communication monitor is a SimObject which can monitor statistics of
|
55 * the communication happening between two ports in the memory system.
56 *
57 * Currently the following stats are implemented: Histograms of read/write
58 * transactions, read/write burst lengths, read/write bandwidth,
59 * outstanding read/write requests, read latency and inter transaction time
60 * (read-read, write-write, read/write-read/write). Furthermore it allows
61 * to capture the number of accesses to an address over time ("heat map").
62 * All stats can be disabled from Python.
63 */
| 56 * the communication happening between two ports in the memory system.
57 *
58 * Currently the following stats are implemented: Histograms of read/write
59 * transactions, read/write burst lengths, read/write bandwidth,
60 * outstanding read/write requests, read latency and inter transaction time
61 * (read-read, write-write, read/write-read/write). Furthermore it allows
62 * to capture the number of accesses to an address over time ("heat map").
63 * All stats can be disabled from Python.
64 */
|
64class CommMonitor : public MemObject
| 65class CommMonitor : public SimObject
|
65{
66
67 public: // Construction & SimObject interfaces
68
69 /** Parameters of communication monitor */
70 typedef CommMonitorParams Params;
71 const Params* params() const
72 { return reinterpret_cast<const Params*>(_params); }
73
74 /**
75 * Constructor based on the Python params
76 *
77 * @param params Python parameters
78 */
79 CommMonitor(Params* params);
80
81 void init() override;
82 void regStats() override;
83 void startup() override;
84 void regProbePoints() override;
85
| 66{
67
68 public: // Construction & SimObject interfaces
69
70 /** Parameters of communication monitor */
71 typedef CommMonitorParams Params;
72 const Params* params() const
73 { return reinterpret_cast<const Params*>(_params); }
74
75 /**
76 * Constructor based on the Python params
77 *
78 * @param params Python parameters
79 */
80 CommMonitor(Params* params);
81
82 void init() override;
83 void regStats() override;
84 void startup() override;
85 void regProbePoints() override;
86
|
86 public: // MemObject interfaces
| 87 public: // SimObject interfaces
|
87 Port &getPort(const std::string &if_name,
88 PortID idx=InvalidPortID) override;
89
90 private:
91
92 /**
93 * Sender state class for the monitor so that we can annotate
94 * packets with a transmit time and receive time.
95 */
96 class CommMonitorSenderState : public Packet::SenderState
97 {
98
99 public:
100
101 /**
102 * Construct a new sender state and store the time so we can
103 * calculate round-trip latency.
104 *
105 * @param _transmitTime Time of packet transmission
106 */
107 CommMonitorSenderState(Tick _transmitTime)
108 : transmitTime(_transmitTime)
109 { }
110
111 /** Destructor */
112 ~CommMonitorSenderState() { }
113
114 /** Tick when request is transmitted */
115 Tick transmitTime;
116
117 };
118
119 /**
120 * This is the master port of the communication monitor. All recv
121 * functions call a function in CommMonitor, where the
122 * send function of the slave port is called. Besides this, these
123 * functions can also perform actions for capturing statistics.
124 */
125 class MonitorMasterPort : public MasterPort
126 {
127
128 public:
129
130 MonitorMasterPort(const std::string& _name, CommMonitor& _mon)
131 : MasterPort(_name, &_mon), mon(_mon)
132 { }
133
134 protected:
135
136 void recvFunctionalSnoop(PacketPtr pkt)
137 {
138 mon.recvFunctionalSnoop(pkt);
139 }
140
141 Tick recvAtomicSnoop(PacketPtr pkt)
142 {
143 return mon.recvAtomicSnoop(pkt);
144 }
145
146 bool recvTimingResp(PacketPtr pkt)
147 {
148 return mon.recvTimingResp(pkt);
149 }
150
151 void recvTimingSnoopReq(PacketPtr pkt)
152 {
153 mon.recvTimingSnoopReq(pkt);
154 }
155
156 void recvRangeChange()
157 {
158 mon.recvRangeChange();
159 }
160
161 bool isSnooping() const
162 {
163 return mon.isSnooping();
164 }
165
166 void recvReqRetry()
167 {
168 mon.recvReqRetry();
169 }
170
171 void recvRetrySnoopResp()
172 {
173 mon.recvRetrySnoopResp();
174 }
175
176 private:
177
178 CommMonitor& mon;
179
180 };
181
182 /** Instance of master port, facing the memory side */
183 MonitorMasterPort masterPort;
184
185 /**
186 * This is the slave port of the communication monitor. All recv
187 * functions call a function in CommMonitor, where the
188 * send function of the master port is called. Besides this, these
189 * functions can also perform actions for capturing statistics.
190 */
191 class MonitorSlavePort : public SlavePort
192 {
193
194 public:
195
196 MonitorSlavePort(const std::string& _name, CommMonitor& _mon)
197 : SlavePort(_name, &_mon), mon(_mon)
198 { }
199
200 protected:
201
202 void recvFunctional(PacketPtr pkt)
203 {
204 mon.recvFunctional(pkt);
205 }
206
207 Tick recvAtomic(PacketPtr pkt)
208 {
209 return mon.recvAtomic(pkt);
210 }
211
212 bool recvTimingReq(PacketPtr pkt)
213 {
214 return mon.recvTimingReq(pkt);
215 }
216
217 bool recvTimingSnoopResp(PacketPtr pkt)
218 {
219 return mon.recvTimingSnoopResp(pkt);
220 }
221
222 AddrRangeList getAddrRanges() const
223 {
224 return mon.getAddrRanges();
225 }
226
227 void recvRespRetry()
228 {
229 mon.recvRespRetry();
230 }
231
232 bool tryTiming(PacketPtr pkt)
233 {
234 return mon.tryTiming(pkt);
235 }
236
237 private:
238
239 CommMonitor& mon;
240
241 };
242
243 /** Instance of slave port, i.e. on the CPU side */
244 MonitorSlavePort slavePort;
245
246 void recvFunctional(PacketPtr pkt);
247
248 void recvFunctionalSnoop(PacketPtr pkt);
249
250 Tick recvAtomic(PacketPtr pkt);
251
252 Tick recvAtomicSnoop(PacketPtr pkt);
253
254 bool recvTimingReq(PacketPtr pkt);
255
256 bool recvTimingResp(PacketPtr pkt);
257
258 void recvTimingSnoopReq(PacketPtr pkt);
259
260 bool recvTimingSnoopResp(PacketPtr pkt);
261
262 void recvRetrySnoopResp();
263
264 AddrRangeList getAddrRanges() const;
265
266 bool isSnooping() const;
267
268 void recvReqRetry();
269
270 void recvRespRetry();
271
272 void recvRangeChange();
273
274 bool tryTiming(PacketPtr pkt);
275
276 /** Stats declarations, all in a struct for convenience. */
277 struct MonitorStats
278 {
279
280 /** Disable flag for burst length histograms **/
281 bool disableBurstLengthHists;
282
283 /** Histogram of read burst lengths */
284 Stats::Histogram readBurstLengthHist;
285
286 /** Histogram of write burst lengths */
287 Stats::Histogram writeBurstLengthHist;
288
289 /** Disable flag for the bandwidth histograms */
290 bool disableBandwidthHists;
291
292 /**
293 * Histogram for read bandwidth per sample window. The
294 * internal counter is an unsigned int rather than a stat.
295 */
296 unsigned int readBytes;
297 Stats::Histogram readBandwidthHist;
298 Stats::Formula averageReadBW;
299 Stats::Scalar totalReadBytes;
300
301 /**
302 * Histogram for write bandwidth per sample window. The
303 * internal counter is an unsigned int rather than a stat.
304 */
305 unsigned int writtenBytes;
306 Stats::Histogram writeBandwidthHist;
307 Stats::Formula averageWriteBW;
308 Stats::Scalar totalWrittenBytes;
309
310 /** Disable flag for latency histograms. */
311 bool disableLatencyHists;
312
313 /** Histogram of read request-to-response latencies */
314 Stats::Histogram readLatencyHist;
315
316 /** Histogram of write request-to-response latencies */
317 Stats::Histogram writeLatencyHist;
318
319 /** Disable flag for ITT distributions. */
320 bool disableITTDists;
321
322 /**
323 * Inter transaction time (ITT) distributions. There are
324 * histograms of the time between two read, write or arbitrary
325 * accesses. The time of a request is the tick at which the
326 * request is forwarded by the monitor.
327 */
328 Stats::Distribution ittReadRead;
329 Stats::Distribution ittWriteWrite;
330 Stats::Distribution ittReqReq;
331 Tick timeOfLastRead;
332 Tick timeOfLastWrite;
333 Tick timeOfLastReq;
334
335 /** Disable flag for outstanding histograms. */
336 bool disableOutstandingHists;
337
338 /**
339 * Histogram of outstanding read requests. Counter for
340 * outstanding read requests is an unsigned integer because
341 * it should not be reset when stats are reset.
342 */
343 Stats::Histogram outstandingReadsHist;
344 unsigned int outstandingReadReqs;
345
346 /**
347 * Histogram of outstanding write requests. Counter for
348 * outstanding write requests is an unsigned integer because
349 * it should not be reset when stats are reset.
350 */
351 Stats::Histogram outstandingWritesHist;
352 unsigned int outstandingWriteReqs;
353
354 /** Disable flag for transaction histograms. */
355 bool disableTransactionHists;
356
357 /** Histogram of number of read transactions per time bin */
358 Stats::Histogram readTransHist;
359 unsigned int readTrans;
360
361 /** Histogram of number of timing write transactions per time bin */
362 Stats::Histogram writeTransHist;
363 unsigned int writeTrans;
364
365 /** Disable flag for address distributions. */
366 bool disableAddrDists;
367
368 /** Address mask for sources of read accesses to be captured */
369 const Addr readAddrMask;
370
371 /** Address mask for sources of write accesses to be captured */
372 const Addr writeAddrMask;
373
374 /**
375 * Histogram of number of read accesses to addresses over
376 * time.
377 */
378 Stats::SparseHistogram readAddrDist;
379
380 /**
381 * Histogram of number of write accesses to addresses over
382 * time.
383 */
384 Stats::SparseHistogram writeAddrDist;
385
386 /**
387 * Create the monitor stats and initialise all the members
388 * that are not statistics themselves, but used to control the
389 * stats or track values during a sample period.
390 */
391 MonitorStats(const CommMonitorParams* params) :
392 disableBurstLengthHists(params->disable_burst_length_hists),
393 disableBandwidthHists(params->disable_bandwidth_hists),
394 readBytes(0), writtenBytes(0),
395 disableLatencyHists(params->disable_latency_hists),
396 disableITTDists(params->disable_itt_dists),
397 timeOfLastRead(0), timeOfLastWrite(0), timeOfLastReq(0),
398 disableOutstandingHists(params->disable_outstanding_hists),
399 outstandingReadReqs(0), outstandingWriteReqs(0),
400 disableTransactionHists(params->disable_transaction_hists),
401 readTrans(0), writeTrans(0),
402 disableAddrDists(params->disable_addr_dists),
403 readAddrMask(params->read_addr_mask),
404 writeAddrMask(params->write_addr_mask)
405 { }
406
407 void updateReqStats(const ProbePoints::PacketInfo& pkt, bool is_atomic,
408 bool expects_response);
409 void updateRespStats(const ProbePoints::PacketInfo& pkt, Tick latency,
410 bool is_atomic);
411 };
412
413 /** This function is called periodically at the end of each time bin */
414 void samplePeriodic();
415
416 /** Periodic event called at the end of each simulation time bin */
417 EventFunctionWrapper samplePeriodicEvent;
418
419 /**
420 *@{
421 * @name Configuration
422 */
423
424 /** Length of simulation time bin*/
425 const Tick samplePeriodTicks;
426 /** Sample period in seconds */
427 const double samplePeriod;
428
429 /** @} */
430
431 /** Instantiate stats */
432 MonitorStats stats;
433
434 protected: // Probe points
435 /**
436 * @{
437 * @name Memory system probe points
438 */
439
440 /** Successfully forwarded request packet */
441 ProbePoints::PacketUPtr ppPktReq;
442
443 /** Successfully forwarded response packet */
444 ProbePoints::PacketUPtr ppPktResp;
445
446 /** @} */
447};
448
449#endif //__MEM_COMM_MONITOR_HH__
| 88 Port &getPort(const std::string &if_name,
89 PortID idx=InvalidPortID) override;
90
91 private:
92
93 /**
94 * Sender state class for the monitor so that we can annotate
95 * packets with a transmit time and receive time.
96 */
97 class CommMonitorSenderState : public Packet::SenderState
98 {
99
100 public:
101
102 /**
103 * Construct a new sender state and store the time so we can
104 * calculate round-trip latency.
105 *
106 * @param _transmitTime Time of packet transmission
107 */
108 CommMonitorSenderState(Tick _transmitTime)
109 : transmitTime(_transmitTime)
110 { }
111
112 /** Destructor */
113 ~CommMonitorSenderState() { }
114
115 /** Tick when request is transmitted */
116 Tick transmitTime;
117
118 };
119
120 /**
121 * This is the master port of the communication monitor. All recv
122 * functions call a function in CommMonitor, where the
123 * send function of the slave port is called. Besides this, these
124 * functions can also perform actions for capturing statistics.
125 */
126 class MonitorMasterPort : public MasterPort
127 {
128
129 public:
130
131 MonitorMasterPort(const std::string& _name, CommMonitor& _mon)
132 : MasterPort(_name, &_mon), mon(_mon)
133 { }
134
135 protected:
136
137 void recvFunctionalSnoop(PacketPtr pkt)
138 {
139 mon.recvFunctionalSnoop(pkt);
140 }
141
142 Tick recvAtomicSnoop(PacketPtr pkt)
143 {
144 return mon.recvAtomicSnoop(pkt);
145 }
146
147 bool recvTimingResp(PacketPtr pkt)
148 {
149 return mon.recvTimingResp(pkt);
150 }
151
152 void recvTimingSnoopReq(PacketPtr pkt)
153 {
154 mon.recvTimingSnoopReq(pkt);
155 }
156
157 void recvRangeChange()
158 {
159 mon.recvRangeChange();
160 }
161
162 bool isSnooping() const
163 {
164 return mon.isSnooping();
165 }
166
167 void recvReqRetry()
168 {
169 mon.recvReqRetry();
170 }
171
172 void recvRetrySnoopResp()
173 {
174 mon.recvRetrySnoopResp();
175 }
176
177 private:
178
179 CommMonitor& mon;
180
181 };
182
183 /** Instance of master port, facing the memory side */
184 MonitorMasterPort masterPort;
185
186 /**
187 * This is the slave port of the communication monitor. All recv
188 * functions call a function in CommMonitor, where the
189 * send function of the master port is called. Besides this, these
190 * functions can also perform actions for capturing statistics.
191 */
192 class MonitorSlavePort : public SlavePort
193 {
194
195 public:
196
197 MonitorSlavePort(const std::string& _name, CommMonitor& _mon)
198 : SlavePort(_name, &_mon), mon(_mon)
199 { }
200
201 protected:
202
203 void recvFunctional(PacketPtr pkt)
204 {
205 mon.recvFunctional(pkt);
206 }
207
208 Tick recvAtomic(PacketPtr pkt)
209 {
210 return mon.recvAtomic(pkt);
211 }
212
213 bool recvTimingReq(PacketPtr pkt)
214 {
215 return mon.recvTimingReq(pkt);
216 }
217
218 bool recvTimingSnoopResp(PacketPtr pkt)
219 {
220 return mon.recvTimingSnoopResp(pkt);
221 }
222
223 AddrRangeList getAddrRanges() const
224 {
225 return mon.getAddrRanges();
226 }
227
228 void recvRespRetry()
229 {
230 mon.recvRespRetry();
231 }
232
233 bool tryTiming(PacketPtr pkt)
234 {
235 return mon.tryTiming(pkt);
236 }
237
238 private:
239
240 CommMonitor& mon;
241
242 };
243
244 /** Instance of slave port, i.e. on the CPU side */
245 MonitorSlavePort slavePort;
246
247 void recvFunctional(PacketPtr pkt);
248
249 void recvFunctionalSnoop(PacketPtr pkt);
250
251 Tick recvAtomic(PacketPtr pkt);
252
253 Tick recvAtomicSnoop(PacketPtr pkt);
254
255 bool recvTimingReq(PacketPtr pkt);
256
257 bool recvTimingResp(PacketPtr pkt);
258
259 void recvTimingSnoopReq(PacketPtr pkt);
260
261 bool recvTimingSnoopResp(PacketPtr pkt);
262
263 void recvRetrySnoopResp();
264
265 AddrRangeList getAddrRanges() const;
266
267 bool isSnooping() const;
268
269 void recvReqRetry();
270
271 void recvRespRetry();
272
273 void recvRangeChange();
274
275 bool tryTiming(PacketPtr pkt);
276
277 /** Stats declarations, all in a struct for convenience. */
278 struct MonitorStats
279 {
280
281 /** Disable flag for burst length histograms **/
282 bool disableBurstLengthHists;
283
284 /** Histogram of read burst lengths */
285 Stats::Histogram readBurstLengthHist;
286
287 /** Histogram of write burst lengths */
288 Stats::Histogram writeBurstLengthHist;
289
290 /** Disable flag for the bandwidth histograms */
291 bool disableBandwidthHists;
292
293 /**
294 * Histogram for read bandwidth per sample window. The
295 * internal counter is an unsigned int rather than a stat.
296 */
297 unsigned int readBytes;
298 Stats::Histogram readBandwidthHist;
299 Stats::Formula averageReadBW;
300 Stats::Scalar totalReadBytes;
301
302 /**
303 * Histogram for write bandwidth per sample window. The
304 * internal counter is an unsigned int rather than a stat.
305 */
306 unsigned int writtenBytes;
307 Stats::Histogram writeBandwidthHist;
308 Stats::Formula averageWriteBW;
309 Stats::Scalar totalWrittenBytes;
310
311 /** Disable flag for latency histograms. */
312 bool disableLatencyHists;
313
314 /** Histogram of read request-to-response latencies */
315 Stats::Histogram readLatencyHist;
316
317 /** Histogram of write request-to-response latencies */
318 Stats::Histogram writeLatencyHist;
319
320 /** Disable flag for ITT distributions. */
321 bool disableITTDists;
322
323 /**
324 * Inter transaction time (ITT) distributions. There are
325 * histograms of the time between two read, write or arbitrary
326 * accesses. The time of a request is the tick at which the
327 * request is forwarded by the monitor.
328 */
329 Stats::Distribution ittReadRead;
330 Stats::Distribution ittWriteWrite;
331 Stats::Distribution ittReqReq;
332 Tick timeOfLastRead;
333 Tick timeOfLastWrite;
334 Tick timeOfLastReq;
335
336 /** Disable flag for outstanding histograms. */
337 bool disableOutstandingHists;
338
339 /**
340 * Histogram of outstanding read requests. Counter for
341 * outstanding read requests is an unsigned integer because
342 * it should not be reset when stats are reset.
343 */
344 Stats::Histogram outstandingReadsHist;
345 unsigned int outstandingReadReqs;
346
347 /**
348 * Histogram of outstanding write requests. Counter for
349 * outstanding write requests is an unsigned integer because
350 * it should not be reset when stats are reset.
351 */
352 Stats::Histogram outstandingWritesHist;
353 unsigned int outstandingWriteReqs;
354
355 /** Disable flag for transaction histograms. */
356 bool disableTransactionHists;
357
358 /** Histogram of number of read transactions per time bin */
359 Stats::Histogram readTransHist;
360 unsigned int readTrans;
361
362 /** Histogram of number of timing write transactions per time bin */
363 Stats::Histogram writeTransHist;
364 unsigned int writeTrans;
365
366 /** Disable flag for address distributions. */
367 bool disableAddrDists;
368
369 /** Address mask for sources of read accesses to be captured */
370 const Addr readAddrMask;
371
372 /** Address mask for sources of write accesses to be captured */
373 const Addr writeAddrMask;
374
375 /**
376 * Histogram of number of read accesses to addresses over
377 * time.
378 */
379 Stats::SparseHistogram readAddrDist;
380
381 /**
382 * Histogram of number of write accesses to addresses over
383 * time.
384 */
385 Stats::SparseHistogram writeAddrDist;
386
387 /**
388 * Create the monitor stats and initialise all the members
389 * that are not statistics themselves, but used to control the
390 * stats or track values during a sample period.
391 */
392 MonitorStats(const CommMonitorParams* params) :
393 disableBurstLengthHists(params->disable_burst_length_hists),
394 disableBandwidthHists(params->disable_bandwidth_hists),
395 readBytes(0), writtenBytes(0),
396 disableLatencyHists(params->disable_latency_hists),
397 disableITTDists(params->disable_itt_dists),
398 timeOfLastRead(0), timeOfLastWrite(0), timeOfLastReq(0),
399 disableOutstandingHists(params->disable_outstanding_hists),
400 outstandingReadReqs(0), outstandingWriteReqs(0),
401 disableTransactionHists(params->disable_transaction_hists),
402 readTrans(0), writeTrans(0),
403 disableAddrDists(params->disable_addr_dists),
404 readAddrMask(params->read_addr_mask),
405 writeAddrMask(params->write_addr_mask)
406 { }
407
408 void updateReqStats(const ProbePoints::PacketInfo& pkt, bool is_atomic,
409 bool expects_response);
410 void updateRespStats(const ProbePoints::PacketInfo& pkt, Tick latency,
411 bool is_atomic);
412 };
413
414 /** This function is called periodically at the end of each time bin */
415 void samplePeriodic();
416
417 /** Periodic event called at the end of each simulation time bin */
418 EventFunctionWrapper samplePeriodicEvent;
419
420 /**
421 *@{
422 * @name Configuration
423 */
424
425 /** Length of simulation time bin*/
426 const Tick samplePeriodTicks;
427 /** Sample period in seconds */
428 const double samplePeriod;
429
430 /** @} */
431
432 /** Instantiate stats */
433 MonitorStats stats;
434
435 protected: // Probe points
436 /**
437 * @{
438 * @name Memory system probe points
439 */
440
441 /** Successfully forwarded request packet */
442 ProbePoints::PacketUPtr ppPktReq;
443
444 /** Successfully forwarded response packet */
445 ProbePoints::PacketUPtr ppPktResp;
446
447 /** @} */
448};
449
450#endif //__MEM_COMM_MONITOR_HH__
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