1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Thomas Grass
38 * Andreas Hansson
39 */
40
41#ifndef __MEM_COMM_MONITOR_HH__
42#define __MEM_COMM_MONITOR_HH__
43
44#include "base/statistics.hh"
45#include "mem/mem_object.hh"
46#include "params/CommMonitor.hh"
47#include "sim/probe/mem.hh"
48
49/**
50 * The communication monitor is a MemObject which can monitor statistics of
51 * the communication happening between two ports in the memory system.
52 *
53 * Currently the following stats are implemented: Histograms of read/write
54 * transactions, read/write burst lengths, read/write bandwidth,
55 * outstanding read/write requests, read latency and inter transaction time
56 * (read-read, write-write, read/write-read/write). Furthermore it allows
57 * to capture the number of accesses to an address over time ("heat map").
58 * All stats can be disabled from Python.
59 */
60class CommMonitor : public MemObject
61{
62
63 public: // Construction & SimObject interfaces
64
65 /** Parameters of communication monitor */
66 typedef CommMonitorParams Params;
67 const Params* params() const
68 { return reinterpret_cast<const Params*>(_params); }
69
70 /**
71 * Constructor based on the Python params
72 *
73 * @param params Python parameters
74 */
75 CommMonitor(Params* params);
76
| 1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Thomas Grass
38 * Andreas Hansson
39 */
40
41#ifndef __MEM_COMM_MONITOR_HH__
42#define __MEM_COMM_MONITOR_HH__
43
44#include "base/statistics.hh"
45#include "mem/mem_object.hh"
46#include "params/CommMonitor.hh"
47#include "sim/probe/mem.hh"
48
49/**
50 * The communication monitor is a MemObject which can monitor statistics of
51 * the communication happening between two ports in the memory system.
52 *
53 * Currently the following stats are implemented: Histograms of read/write
54 * transactions, read/write burst lengths, read/write bandwidth,
55 * outstanding read/write requests, read latency and inter transaction time
56 * (read-read, write-write, read/write-read/write). Furthermore it allows
57 * to capture the number of accesses to an address over time ("heat map").
58 * All stats can be disabled from Python.
59 */
60class CommMonitor : public MemObject
61{
62
63 public: // Construction & SimObject interfaces
64
65 /** Parameters of communication monitor */
66 typedef CommMonitorParams Params;
67 const Params* params() const
68 { return reinterpret_cast<const Params*>(_params); }
69
70 /**
71 * Constructor based on the Python params
72 *
73 * @param params Python parameters
74 */
75 CommMonitor(Params* params);
76
|
77 void init() M5_ATTR_OVERRIDE;
78 void regStats() M5_ATTR_OVERRIDE;
79 void startup() M5_ATTR_OVERRIDE;
80 void regProbePoints() M5_ATTR_OVERRIDE;
| 77 void init() override;
78 void regStats() override;
79 void startup() override;
80 void regProbePoints() override;
|
81
82 public: // MemObject interfaces
83 BaseMasterPort& getMasterPort(const std::string& if_name,
| 81
82 public: // MemObject interfaces
83 BaseMasterPort& getMasterPort(const std::string& if_name,
|
84 PortID idx = InvalidPortID) M5_ATTR_OVERRIDE;
| 84 PortID idx = InvalidPortID) override;
|
85
86 BaseSlavePort& getSlavePort(const std::string& if_name,
| 85
86 BaseSlavePort& getSlavePort(const std::string& if_name,
|
87 PortID idx = InvalidPortID) M5_ATTR_OVERRIDE;
| 87 PortID idx = InvalidPortID) override;
|
88
89 private:
90
91 /**
92 * Sender state class for the monitor so that we can annotate
93 * packets with a transmit time and receive time.
94 */
95 class CommMonitorSenderState : public Packet::SenderState
96 {
97
98 public:
99
100 /**
101 * Construct a new sender state and store the time so we can
102 * calculate round-trip latency.
103 *
104 * @param _transmitTime Time of packet transmission
105 */
106 CommMonitorSenderState(Tick _transmitTime)
107 : transmitTime(_transmitTime)
108 { }
109
110 /** Destructor */
111 ~CommMonitorSenderState() { }
112
113 /** Tick when request is transmitted */
114 Tick transmitTime;
115
116 };
117
118 /**
119 * This is the master port of the communication monitor. All recv
120 * functions call a function in CommMonitor, where the
121 * send function of the slave port is called. Besides this, these
122 * functions can also perform actions for capturing statistics.
123 */
124 class MonitorMasterPort : public MasterPort
125 {
126
127 public:
128
129 MonitorMasterPort(const std::string& _name, CommMonitor& _mon)
130 : MasterPort(_name, &_mon), mon(_mon)
131 { }
132
133 protected:
134
135 void recvFunctionalSnoop(PacketPtr pkt)
136 {
137 mon.recvFunctionalSnoop(pkt);
138 }
139
140 Tick recvAtomicSnoop(PacketPtr pkt)
141 {
142 return mon.recvAtomicSnoop(pkt);
143 }
144
145 bool recvTimingResp(PacketPtr pkt)
146 {
147 return mon.recvTimingResp(pkt);
148 }
149
150 void recvTimingSnoopReq(PacketPtr pkt)
151 {
152 mon.recvTimingSnoopReq(pkt);
153 }
154
155 void recvRangeChange()
156 {
157 mon.recvRangeChange();
158 }
159
160 bool isSnooping() const
161 {
162 return mon.isSnooping();
163 }
164
165 void recvReqRetry()
166 {
167 mon.recvReqRetry();
168 }
169
170 private:
171
172 CommMonitor& mon;
173
174 };
175
176 /** Instance of master port, facing the memory side */
177 MonitorMasterPort masterPort;
178
179 /**
180 * This is the slave port of the communication monitor. All recv
181 * functions call a function in CommMonitor, where the
182 * send function of the master port is called. Besides this, these
183 * functions can also perform actions for capturing statistics.
184 */
185 class MonitorSlavePort : public SlavePort
186 {
187
188 public:
189
190 MonitorSlavePort(const std::string& _name, CommMonitor& _mon)
191 : SlavePort(_name, &_mon), mon(_mon)
192 { }
193
194 protected:
195
196 void recvFunctional(PacketPtr pkt)
197 {
198 mon.recvFunctional(pkt);
199 }
200
201 Tick recvAtomic(PacketPtr pkt)
202 {
203 return mon.recvAtomic(pkt);
204 }
205
206 bool recvTimingReq(PacketPtr pkt)
207 {
208 return mon.recvTimingReq(pkt);
209 }
210
211 bool recvTimingSnoopResp(PacketPtr pkt)
212 {
213 return mon.recvTimingSnoopResp(pkt);
214 }
215
216 AddrRangeList getAddrRanges() const
217 {
218 return mon.getAddrRanges();
219 }
220
221 void recvRespRetry()
222 {
223 mon.recvRespRetry();
224 }
225
226 private:
227
228 CommMonitor& mon;
229
230 };
231
232 /** Instance of slave port, i.e. on the CPU side */
233 MonitorSlavePort slavePort;
234
235 void recvFunctional(PacketPtr pkt);
236
237 void recvFunctionalSnoop(PacketPtr pkt);
238
239 Tick recvAtomic(PacketPtr pkt);
240
241 Tick recvAtomicSnoop(PacketPtr pkt);
242
243 bool recvTimingReq(PacketPtr pkt);
244
245 bool recvTimingResp(PacketPtr pkt);
246
247 void recvTimingSnoopReq(PacketPtr pkt);
248
249 bool recvTimingSnoopResp(PacketPtr pkt);
250
251 AddrRangeList getAddrRanges() const;
252
253 bool isSnooping() const;
254
255 void recvReqRetry();
256
257 void recvRespRetry();
258
259 void recvRangeChange();
260
261 /** Stats declarations, all in a struct for convenience. */
262 struct MonitorStats
263 {
264
265 /** Disable flag for burst length historgrams **/
266 bool disableBurstLengthHists;
267
268 /** Histogram of read burst lengths */
269 Stats::Histogram readBurstLengthHist;
270
271 /** Histogram of write burst lengths */
272 Stats::Histogram writeBurstLengthHist;
273
274 /** Disable flag for the bandwidth histograms */
275 bool disableBandwidthHists;
276
277 /**
278 * Histogram for read bandwidth per sample window. The
279 * internal counter is an unsigned int rather than a stat.
280 */
281 unsigned int readBytes;
282 Stats::Histogram readBandwidthHist;
283 Stats::Formula averageReadBW;
284 Stats::Scalar totalReadBytes;
285
286 /**
287 * Histogram for write bandwidth per sample window. The
288 * internal counter is an unsigned int rather than a stat.
289 */
290 unsigned int writtenBytes;
291 Stats::Histogram writeBandwidthHist;
292 Stats::Formula averageWriteBW;
293 Stats::Scalar totalWrittenBytes;
294
295 /** Disable flag for latency histograms. */
296 bool disableLatencyHists;
297
298 /** Histogram of read request-to-response latencies */
299 Stats::Histogram readLatencyHist;
300
301 /** Histogram of write request-to-response latencies */
302 Stats::Histogram writeLatencyHist;
303
304 /** Disable flag for ITT distributions. */
305 bool disableITTDists;
306
307 /**
308 * Inter transaction time (ITT) distributions. There are
309 * histograms of the time between two read, write or arbitrary
310 * accesses. The time of a request is the tick at which the
311 * request is forwarded by the monitor.
312 */
313 Stats::Distribution ittReadRead;
314 Stats::Distribution ittWriteWrite;
315 Stats::Distribution ittReqReq;
316 Tick timeOfLastRead;
317 Tick timeOfLastWrite;
318 Tick timeOfLastReq;
319
320 /** Disable flag for outstanding histograms. */
321 bool disableOutstandingHists;
322
323 /**
324 * Histogram of outstanding read requests. Counter for
325 * outstanding read requests is an unsigned integer because
326 * it should not be reset when stats are reset.
327 */
328 Stats::Histogram outstandingReadsHist;
329 unsigned int outstandingReadReqs;
330
331 /**
332 * Histogram of outstanding write requests. Counter for
333 * outstanding write requests is an unsigned integer because
334 * it should not be reset when stats are reset.
335 */
336 Stats::Histogram outstandingWritesHist;
337 unsigned int outstandingWriteReqs;
338
339 /** Disable flag for transaction histograms. */
340 bool disableTransactionHists;
341
342 /** Histogram of number of read transactions per time bin */
343 Stats::Histogram readTransHist;
344 unsigned int readTrans;
345
346 /** Histogram of number of timing write transactions per time bin */
347 Stats::Histogram writeTransHist;
348 unsigned int writeTrans;
349
350 /** Disable flag for address distributions. */
351 bool disableAddrDists;
352
353 /**
354 * Histogram of number of read accesses to addresses over
355 * time.
356 */
357 Stats::SparseHistogram readAddrDist;
358
359 /**
360 * Histogram of number of write accesses to addresses over
361 * time.
362 */
363 Stats::SparseHistogram writeAddrDist;
364
365 /**
366 * Create the monitor stats and initialise all the members
367 * that are not statistics themselves, but used to control the
368 * stats or track values during a sample period.
369 */
370 MonitorStats(const CommMonitorParams* params) :
371 disableBurstLengthHists(params->disable_burst_length_hists),
372 disableBandwidthHists(params->disable_bandwidth_hists),
373 readBytes(0), writtenBytes(0),
374 disableLatencyHists(params->disable_latency_hists),
375 disableITTDists(params->disable_itt_dists),
376 timeOfLastRead(0), timeOfLastWrite(0), timeOfLastReq(0),
377 disableOutstandingHists(params->disable_outstanding_hists),
378 outstandingReadReqs(0), outstandingWriteReqs(0),
379 disableTransactionHists(params->disable_transaction_hists),
380 readTrans(0), writeTrans(0),
381 disableAddrDists(params->disable_addr_dists)
382 { }
383
384 };
385
386 /** This function is called periodically at the end of each time bin */
387 void samplePeriodic();
388
389 /** Periodic event called at the end of each simulation time bin */
390 EventWrapper<CommMonitor, &CommMonitor::samplePeriodic> samplePeriodicEvent;
391
392 /**
393 *@{
394 * @name Configuration
395 */
396
397 /** Length of simulation time bin*/
398 const Tick samplePeriodTicks;
399 /** Sample period in seconds */
400 const double samplePeriod;
401
402 /** Address mask for sources of read accesses to be captured */
403 const Addr readAddrMask;
404
405 /** Address mask for sources of write accesses to be captured */
406 const Addr writeAddrMask;
407
408 /** @} */
409
410 /** Instantiate stats */
411 MonitorStats stats;
412
413 protected: // Probe points
414 /**
415 * @{
416 * @name Memory system probe points
417 */
418
419 /** Successfully forwarded request packet */
420 ProbePoints::PacketUPtr ppPktReq;
421
422 /** Successfully forwarded response packet */
423 ProbePoints::PacketUPtr ppPktResp;
424
425 /** @} */
426};
427
428#endif //__MEM_COMM_MONITOR_HH__
| 88
89 private:
90
91 /**
92 * Sender state class for the monitor so that we can annotate
93 * packets with a transmit time and receive time.
94 */
95 class CommMonitorSenderState : public Packet::SenderState
96 {
97
98 public:
99
100 /**
101 * Construct a new sender state and store the time so we can
102 * calculate round-trip latency.
103 *
104 * @param _transmitTime Time of packet transmission
105 */
106 CommMonitorSenderState(Tick _transmitTime)
107 : transmitTime(_transmitTime)
108 { }
109
110 /** Destructor */
111 ~CommMonitorSenderState() { }
112
113 /** Tick when request is transmitted */
114 Tick transmitTime;
115
116 };
117
118 /**
119 * This is the master port of the communication monitor. All recv
120 * functions call a function in CommMonitor, where the
121 * send function of the slave port is called. Besides this, these
122 * functions can also perform actions for capturing statistics.
123 */
124 class MonitorMasterPort : public MasterPort
125 {
126
127 public:
128
129 MonitorMasterPort(const std::string& _name, CommMonitor& _mon)
130 : MasterPort(_name, &_mon), mon(_mon)
131 { }
132
133 protected:
134
135 void recvFunctionalSnoop(PacketPtr pkt)
136 {
137 mon.recvFunctionalSnoop(pkt);
138 }
139
140 Tick recvAtomicSnoop(PacketPtr pkt)
141 {
142 return mon.recvAtomicSnoop(pkt);
143 }
144
145 bool recvTimingResp(PacketPtr pkt)
146 {
147 return mon.recvTimingResp(pkt);
148 }
149
150 void recvTimingSnoopReq(PacketPtr pkt)
151 {
152 mon.recvTimingSnoopReq(pkt);
153 }
154
155 void recvRangeChange()
156 {
157 mon.recvRangeChange();
158 }
159
160 bool isSnooping() const
161 {
162 return mon.isSnooping();
163 }
164
165 void recvReqRetry()
166 {
167 mon.recvReqRetry();
168 }
169
170 private:
171
172 CommMonitor& mon;
173
174 };
175
176 /** Instance of master port, facing the memory side */
177 MonitorMasterPort masterPort;
178
179 /**
180 * This is the slave port of the communication monitor. All recv
181 * functions call a function in CommMonitor, where the
182 * send function of the master port is called. Besides this, these
183 * functions can also perform actions for capturing statistics.
184 */
185 class MonitorSlavePort : public SlavePort
186 {
187
188 public:
189
190 MonitorSlavePort(const std::string& _name, CommMonitor& _mon)
191 : SlavePort(_name, &_mon), mon(_mon)
192 { }
193
194 protected:
195
196 void recvFunctional(PacketPtr pkt)
197 {
198 mon.recvFunctional(pkt);
199 }
200
201 Tick recvAtomic(PacketPtr pkt)
202 {
203 return mon.recvAtomic(pkt);
204 }
205
206 bool recvTimingReq(PacketPtr pkt)
207 {
208 return mon.recvTimingReq(pkt);
209 }
210
211 bool recvTimingSnoopResp(PacketPtr pkt)
212 {
213 return mon.recvTimingSnoopResp(pkt);
214 }
215
216 AddrRangeList getAddrRanges() const
217 {
218 return mon.getAddrRanges();
219 }
220
221 void recvRespRetry()
222 {
223 mon.recvRespRetry();
224 }
225
226 private:
227
228 CommMonitor& mon;
229
230 };
231
232 /** Instance of slave port, i.e. on the CPU side */
233 MonitorSlavePort slavePort;
234
235 void recvFunctional(PacketPtr pkt);
236
237 void recvFunctionalSnoop(PacketPtr pkt);
238
239 Tick recvAtomic(PacketPtr pkt);
240
241 Tick recvAtomicSnoop(PacketPtr pkt);
242
243 bool recvTimingReq(PacketPtr pkt);
244
245 bool recvTimingResp(PacketPtr pkt);
246
247 void recvTimingSnoopReq(PacketPtr pkt);
248
249 bool recvTimingSnoopResp(PacketPtr pkt);
250
251 AddrRangeList getAddrRanges() const;
252
253 bool isSnooping() const;
254
255 void recvReqRetry();
256
257 void recvRespRetry();
258
259 void recvRangeChange();
260
261 /** Stats declarations, all in a struct for convenience. */
262 struct MonitorStats
263 {
264
265 /** Disable flag for burst length historgrams **/
266 bool disableBurstLengthHists;
267
268 /** Histogram of read burst lengths */
269 Stats::Histogram readBurstLengthHist;
270
271 /** Histogram of write burst lengths */
272 Stats::Histogram writeBurstLengthHist;
273
274 /** Disable flag for the bandwidth histograms */
275 bool disableBandwidthHists;
276
277 /**
278 * Histogram for read bandwidth per sample window. The
279 * internal counter is an unsigned int rather than a stat.
280 */
281 unsigned int readBytes;
282 Stats::Histogram readBandwidthHist;
283 Stats::Formula averageReadBW;
284 Stats::Scalar totalReadBytes;
285
286 /**
287 * Histogram for write bandwidth per sample window. The
288 * internal counter is an unsigned int rather than a stat.
289 */
290 unsigned int writtenBytes;
291 Stats::Histogram writeBandwidthHist;
292 Stats::Formula averageWriteBW;
293 Stats::Scalar totalWrittenBytes;
294
295 /** Disable flag for latency histograms. */
296 bool disableLatencyHists;
297
298 /** Histogram of read request-to-response latencies */
299 Stats::Histogram readLatencyHist;
300
301 /** Histogram of write request-to-response latencies */
302 Stats::Histogram writeLatencyHist;
303
304 /** Disable flag for ITT distributions. */
305 bool disableITTDists;
306
307 /**
308 * Inter transaction time (ITT) distributions. There are
309 * histograms of the time between two read, write or arbitrary
310 * accesses. The time of a request is the tick at which the
311 * request is forwarded by the monitor.
312 */
313 Stats::Distribution ittReadRead;
314 Stats::Distribution ittWriteWrite;
315 Stats::Distribution ittReqReq;
316 Tick timeOfLastRead;
317 Tick timeOfLastWrite;
318 Tick timeOfLastReq;
319
320 /** Disable flag for outstanding histograms. */
321 bool disableOutstandingHists;
322
323 /**
324 * Histogram of outstanding read requests. Counter for
325 * outstanding read requests is an unsigned integer because
326 * it should not be reset when stats are reset.
327 */
328 Stats::Histogram outstandingReadsHist;
329 unsigned int outstandingReadReqs;
330
331 /**
332 * Histogram of outstanding write requests. Counter for
333 * outstanding write requests is an unsigned integer because
334 * it should not be reset when stats are reset.
335 */
336 Stats::Histogram outstandingWritesHist;
337 unsigned int outstandingWriteReqs;
338
339 /** Disable flag for transaction histograms. */
340 bool disableTransactionHists;
341
342 /** Histogram of number of read transactions per time bin */
343 Stats::Histogram readTransHist;
344 unsigned int readTrans;
345
346 /** Histogram of number of timing write transactions per time bin */
347 Stats::Histogram writeTransHist;
348 unsigned int writeTrans;
349
350 /** Disable flag for address distributions. */
351 bool disableAddrDists;
352
353 /**
354 * Histogram of number of read accesses to addresses over
355 * time.
356 */
357 Stats::SparseHistogram readAddrDist;
358
359 /**
360 * Histogram of number of write accesses to addresses over
361 * time.
362 */
363 Stats::SparseHistogram writeAddrDist;
364
365 /**
366 * Create the monitor stats and initialise all the members
367 * that are not statistics themselves, but used to control the
368 * stats or track values during a sample period.
369 */
370 MonitorStats(const CommMonitorParams* params) :
371 disableBurstLengthHists(params->disable_burst_length_hists),
372 disableBandwidthHists(params->disable_bandwidth_hists),
373 readBytes(0), writtenBytes(0),
374 disableLatencyHists(params->disable_latency_hists),
375 disableITTDists(params->disable_itt_dists),
376 timeOfLastRead(0), timeOfLastWrite(0), timeOfLastReq(0),
377 disableOutstandingHists(params->disable_outstanding_hists),
378 outstandingReadReqs(0), outstandingWriteReqs(0),
379 disableTransactionHists(params->disable_transaction_hists),
380 readTrans(0), writeTrans(0),
381 disableAddrDists(params->disable_addr_dists)
382 { }
383
384 };
385
386 /** This function is called periodically at the end of each time bin */
387 void samplePeriodic();
388
389 /** Periodic event called at the end of each simulation time bin */
390 EventWrapper<CommMonitor, &CommMonitor::samplePeriodic> samplePeriodicEvent;
391
392 /**
393 *@{
394 * @name Configuration
395 */
396
397 /** Length of simulation time bin*/
398 const Tick samplePeriodTicks;
399 /** Sample period in seconds */
400 const double samplePeriod;
401
402 /** Address mask for sources of read accesses to be captured */
403 const Addr readAddrMask;
404
405 /** Address mask for sources of write accesses to be captured */
406 const Addr writeAddrMask;
407
408 /** @} */
409
410 /** Instantiate stats */
411 MonitorStats stats;
412
413 protected: // Probe points
414 /**
415 * @{
416 * @name Memory system probe points
417 */
418
419 /** Successfully forwarded request packet */
420 ProbePoints::PacketUPtr ppPktReq;
421
422 /** Successfully forwarded response packet */
423 ProbePoints::PacketUPtr ppPktResp;
424
425 /** @} */
426};
427
428#endif //__MEM_COMM_MONITOR_HH__
|