comm_monitor.cc (9398:6a348f61220c) | comm_monitor.cc (9540:9ddb996931d7) |
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1/* | 1/* |
2 * Copyright (c) 2012 ARM Limited | 2 * Copyright (c) 2012-2013 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 146 unchanged lines hidden (view full) --- 157{ 158 // should always see a request 159 assert(pkt->isRequest()); 160 161 // Store relevant fields of packet, because packet may be modified 162 // or even deleted when sendTiming() is called. 163 bool isRead = pkt->isRead(); 164 bool isWrite = pkt->isWrite(); | 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 146 unchanged lines hidden (view full) --- 157{ 158 // should always see a request 159 assert(pkt->isRequest()); 160 161 // Store relevant fields of packet, because packet may be modified 162 // or even deleted when sendTiming() is called. 163 bool isRead = pkt->isRead(); 164 bool isWrite = pkt->isWrite(); |
165 int cmd = pkt->cmdToIndex(); |
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165 unsigned size = pkt->getSize(); 166 Addr addr = pkt->getAddr(); 167 bool needsResponse = pkt->needsResponse(); 168 bool memInhibitAsserted = pkt->memInhibitAsserted(); 169 Packet::SenderState* senderState = pkt->senderState; 170 171 // If a cache miss is served by a cache, a monitor near the memory 172 // would see a request which needs a response, but this response --- 15 unchanged lines hidden (view full) --- 188 } 189 190 if (successful && traceStream != NULL) { 191 // Create a protobuf message representing the 192 // packet. Currently we do not preserve the flags in the 193 // trace. 194 Message::Packet pkt_msg; 195 pkt_msg.set_tick(curTick()); | 166 unsigned size = pkt->getSize(); 167 Addr addr = pkt->getAddr(); 168 bool needsResponse = pkt->needsResponse(); 169 bool memInhibitAsserted = pkt->memInhibitAsserted(); 170 Packet::SenderState* senderState = pkt->senderState; 171 172 // If a cache miss is served by a cache, a monitor near the memory 173 // would see a request which needs a response, but this response --- 15 unchanged lines hidden (view full) --- 189 } 190 191 if (successful && traceStream != NULL) { 192 // Create a protobuf message representing the 193 // packet. Currently we do not preserve the flags in the 194 // trace. 195 Message::Packet pkt_msg; 196 pkt_msg.set_tick(curTick()); |
196 pkt_msg.set_cmd(pkt->cmdToIndex()); 197 pkt_msg.set_addr(pkt->getAddr()); 198 pkt_msg.set_size(pkt->getSize()); | 197 pkt_msg.set_cmd(cmd); 198 pkt_msg.set_addr(addr); 199 pkt_msg.set_size(size); |
199 200 traceStream->write(pkt_msg); 201 } 202 203 if (successful && isRead) { 204 DPRINTF(CommMonitor, "Forwarded read request\n"); 205 206 // Increment number of observed read transactions --- 381 unchanged lines hidden --- | 200 201 traceStream->write(pkt_msg); 202 } 203 204 if (successful && isRead) { 205 DPRINTF(CommMonitor, "Forwarded read request\n"); 206 207 // Increment number of observed read transactions --- 381 unchanged lines hidden --- |