coherent_xbar.cc (13808:0a44fbc3a853) coherent_xbar.cc (13847:c9b92a513019)
1/*
2 * Copyright (c) 2011-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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716{
717 // responses and snoop responses never block on forwarding them,
718 // so the retry will always be coming from a port to which we
719 // tried to forward a request
720 reqLayers[master_port_id]->recvRetry();
721}
722
723Tick
1/*
2 * Copyright (c) 2011-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 707 unchanged lines hidden (view full) ---

716{
717 // responses and snoop responses never block on forwarding them,
718 // so the retry will always be coming from a port to which we
719 // tried to forward a request
720 reqLayers[master_port_id]->recvRetry();
721}
722
723Tick
724CoherentXBar::recvAtomic(PacketPtr pkt, PortID slave_port_id)
724CoherentXBar::recvAtomicBackdoor(PacketPtr pkt, PortID slave_port_id,
725 MemBackdoorPtr *backdoor)
725{
726 DPRINTF(CoherentXBar, "%s: src %s packet %s\n", __func__,
727 slavePorts[slave_port_id]->name(), pkt->print());
728
729 unsigned int pkt_size = pkt->hasData() ? pkt->getSize() : 0;
730 unsigned int pkt_cmd = pkt->cmdToIndex();
731
732 MemCmd snoop_response_cmd = MemCmd::InvalidCmd;

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795 // make sure that the write request (e.g., WriteClean)
796 // will stop at the memory below if this crossbar is its
797 // destination
798 if (pkt->isWrite() && is_destination) {
799 pkt->clearWriteThrough();
800 }
801
802 // forward the request to the appropriate destination
726{
727 DPRINTF(CoherentXBar, "%s: src %s packet %s\n", __func__,
728 slavePorts[slave_port_id]->name(), pkt->print());
729
730 unsigned int pkt_size = pkt->hasData() ? pkt->getSize() : 0;
731 unsigned int pkt_cmd = pkt->cmdToIndex();
732
733 MemCmd snoop_response_cmd = MemCmd::InvalidCmd;

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796 // make sure that the write request (e.g., WriteClean)
797 // will stop at the memory below if this crossbar is its
798 // destination
799 if (pkt->isWrite() && is_destination) {
800 pkt->clearWriteThrough();
801 }
802
803 // forward the request to the appropriate destination
803 response_latency = masterPorts[master_port_id]->sendAtomic(pkt);
804 auto master = masterPorts[master_port_id];
805 response_latency = backdoor ?
806 master->sendAtomicBackdoor(pkt, *backdoor) :
807 master->sendAtomic(pkt);
804 } else {
805 // if it does not need a response we sink the packet above
806 assert(pkt->needsResponse());
807
808 pkt->makeResponse();
809 }
810 }
811

--- 322 unchanged lines hidden --- 		808 } else {
809 // if it does not need a response we sink the packet above
810 assert(pkt->needsResponse());
811
812 pkt->makeResponse();
813 }
814 }
815

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