fa_lru.hh (12753:fe5b2dbe42bb) fa_lru.hh (12773:387fa9e5c9ff)
1/*
2 * Copyright (c) 2012-2013,2016,2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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63#include "mem/cache/tags/base.hh"
64#include "mem/packet.hh"
65#include "params/FALRU.hh"
66
67// Uncomment to enable sanity checks for the FALRU cache and the
68// TrackedCaches class
69//#define FALRU_DEBUG
70
1/*
2 * Copyright (c) 2012-2013,2016,2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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63#include "mem/cache/tags/base.hh"
64#include "mem/packet.hh"
65#include "params/FALRU.hh"
66
67// Uncomment to enable sanity checks for the FALRU cache and the
68// TrackedCaches class
69//#define FALRU_DEBUG
70
71class ReplaceableEntry;
72
71// A bitmask of the caches we are keeping track of. Currently the
72// lowest bit is the smallest cache we are tracking, as it is
73// specified by the corresponding parameter. The rest of the bits are
74// for exponentially growing cache sizes.
75typedef uint32_t CachesMask;
76
77/**
78 * A fully associative cache block.

--- 301 unchanged lines hidden --- 		73// A bitmask of the caches we are keeping track of. Currently the
74// lowest bit is the smallest cache we are tracking, as it is
75// specified by the corresponding parameter. The rest of the bits are
76// for exponentially growing cache sizes.
77typedef uint32_t CachesMask;
78
79/**
80 * A fully associative cache block.

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