fa_lru.hh (11055:54071fd5c397) fa_lru.hh (11168:f98eb2da15a4)
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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44 * @file
45 * Declaration of a fully associative LRU tag store.
46 */
47
48#ifndef __MEM_CACHE_TAGS_FA_LRU_HH__
49#define __MEM_CACHE_TAGS_FA_LRU_HH__
50
51#include <list>
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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44 * @file
45 * Declaration of a fully associative LRU tag store.
46 */
47
48#ifndef __MEM_CACHE_TAGS_FA_LRU_HH__
49#define __MEM_CACHE_TAGS_FA_LRU_HH__
50
51#include <list>
52#include <unordered_map>
52
53
53#include "base/hashmap.hh"
54#include "mem/cache/tags/base.hh"
55#include "mem/cache/blk.hh"
56#include "mem/packet.hh"
57#include "params/FALRU.hh"
58
59/**
60 * A fully associative cache block.
61 */

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104 FALRUBlk *blks;
105
106 /** The MRU block. */
107 FALRUBlk *head;
108 /** The LRU block. */
109 FALRUBlk *tail;
110
111 /** Hash table type mapping addresses to cache block pointers. */
54#include "mem/cache/tags/base.hh"
55#include "mem/cache/blk.hh"
56#include "mem/packet.hh"
57#include "params/FALRU.hh"
58
59/**
60 * A fully associative cache block.
61 */

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104 FALRUBlk *blks;
105
106 /** The MRU block. */
107 FALRUBlk *head;
108 /** The LRU block. */
109 FALRUBlk *tail;
110
111 /** Hash table type mapping addresses to cache block pointers. */
112 typedef m5::hash_map<Addr, FALRUBlk *, m5::hash<Addr> > hash_t;
112 typedef std::unordered_map<Addr, FALRUBlk *, std::hash<Addr> > hash_t;
113 /** Iterator into the address hash table. */
114 typedef hash_t::const_iterator tagIterator;
115
116 /** The address hash table. */
117 hash_t tagHash;
118
119 /**
120 * Find the cache block for the given address.

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317 * The visitor should be a function (or object that behaves like a
318 * function) that takes a cache block reference as its parameter
319 * and returns a bool. A visitor can request the traversal to be
320 * stopped by returning false, returning true causes it to be
321 * called for the next block in the tag store.
322 *
323 * \param visitor Visitor to call on each block.
324 */
113 /** Iterator into the address hash table. */
114 typedef hash_t::const_iterator tagIterator;
115
116 /** The address hash table. */
117 hash_t tagHash;
118
119 /**
120 * Find the cache block for the given address.

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317 * The visitor should be a function (or object that behaves like a
318 * function) that takes a cache block reference as its parameter
319 * and returns a bool. A visitor can request the traversal to be
320 * stopped by returning false, returning true causes it to be
321 * called for the next block in the tag store.
322 *
323 * \param visitor Visitor to call on each block.
324 */
325 void forEachBlk(CacheBlkVisitor &visitor) M5_ATTR_OVERRIDE {
325 void forEachBlk(CacheBlkVisitor &visitor) override {
326 for (int i = 0; i < numBlocks; i++) {
327 if (!visitor(blks[i]))
328 return;
329 }
330 }
331
332};
333
334#endif // __MEM_CACHE_TAGS_FA_LRU_HH__
326 for (int i = 0; i < numBlocks; i++) {
327 if (!visitor(blks[i]))
328 return;
329 }
330 }
331
332};
333
334#endif // __MEM_CACHE_TAGS_FA_LRU_HH__