1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 71 unchanged lines hidden (view full) --- 80 typedef std::list<FALRUBlk*> BlkList; 81 82 protected: 83 /** The block size of the cache. */ 84 const unsigned blkSize; 85 /** The size of the cache. */ 86 const unsigned size; 87 /** The hit latency of the cache. */ |
88 const Cycles hitLatency; |
89 90 /** Array of pointers to blocks at the cache size boundaries. */ 91 FALRUBlk **cacheBoundaries; 92 /** A mask for the FALRUBlk::inCache bits. */ 93 int cacheMask; 94 /** The number of different size caches being tracked. */ 95 unsigned numCaches; 96 --- 53 unchanged lines hidden (view full) --- 150 151public: 152 /** 153 * Construct and initialize this cache tagstore. 154 * @param blkSize The block size of the cache. 155 * @param size The size of the cache. 156 * @param hit_latency The hit latency of the cache. 157 */ |
158 FALRU(unsigned blkSize, unsigned size, Cycles hit_latency); |
159 ~FALRU(); 160 161 /** 162 * Register the stats for this object. 163 * @param name The name to prepend to the stats name. 164 */ 165 void regStats(const std::string &name); 166 --- 9 unchanged lines hidden (view full) --- 176 * access and should only be used as such. 177 * Returns the access latency and inCache flags as a side effect. 178 * @param addr The address to look for. 179 * @param asid The address space ID. 180 * @param lat The latency of the access. 181 * @param inCache The FALRUBlk::inCache flags. 182 * @return Pointer to the cache block. 183 */ |
184 FALRUBlk* accessBlock(Addr addr, Cycles &lat, int context_src, int *inCache = 0); |
185 186 /** 187 * Find the block in the cache, do not update the replacement data. 188 * @param addr The address to look for. 189 * @param asid The address space ID. 190 * @return Pointer to the cache block. 191 */ 192 FALRUBlk* findBlock(Addr addr) const; --- 7 unchanged lines hidden (view full) --- 200 FALRUBlk* findVictim(Addr addr, PacketList & writebacks); 201 202 void insertBlock(Addr addr, BlkType *blk, int context_src); 203 204 /** 205 * Return the hit latency of this cache. 206 * @return The hit latency. 207 */ |
208 Cycles getHitLatency() const |
209 { 210 return hitLatency; 211 } 212 213 /** 214 * Return the block size of this cache. 215 * @return The block size. 216 */ --- 76 unchanged lines hidden --- |