1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 160 unchanged lines hidden (view full) --- 169 * @param name The name to prepend to the stats name. 170 */ 171 void regStats(); 172 173 /** 174 * Invalidate a cache block. 175 * @param blk The block to invalidate. 176 */ |
177 void invalidate(CacheBlk *blk); |
178 179 /** 180 * Access block and update replacement data. May not succeed, in which case 181 * NULL pointer is returned. This has all the implications of a cache 182 * access and should only be used as such. 183 * Returns the access latency and inCache flags as a side effect. 184 * @param addr The address to look for. 185 * @param is_secure True if the target memory space is secure. 186 * @param asid The address space ID. 187 * @param lat The latency of the access. 188 * @param inCache The FALRUBlk::inCache flags. 189 * @return Pointer to the cache block. 190 */ |
191 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat, 192 int context_src, int *inCache); |
193 194 /** |
195 * Just a wrapper of above function to conform with the base interface. 196 */ 197 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat, 198 int context_src); 199 200 /** |
201 * Find the block in the cache, do not update the replacement data. 202 * @param addr The address to look for. 203 * @param is_secure True if the target memory space is secure. 204 * @param asid The address space ID. 205 * @return Pointer to the cache block. 206 */ |
207 CacheBlk* findBlock(Addr addr, bool is_secure) const; |
208 209 /** 210 * Find a replacement block for the address provided. 211 * @param pkt The request to a find a replacement candidate for. 212 * @return The block to place the replacement in. 213 */ |
214 CacheBlk* findVictim(Addr addr); |
215 |
216 void insertBlock(PacketPtr pkt, CacheBlk *blk); |
217 218 /** 219 * Return the block size of this cache. 220 * @return The block size. 221 */ 222 unsigned 223 getBlockSize() const 224 { --- 37 unchanged lines hidden (view full) --- 262 * @return 0. 263 */ 264 int extractSet(Addr addr) const 265 { 266 return 0; 267 } 268 269 /** |
270 * Regenerate the block address from the tag and the set. 271 * @param tag The tag of the block. 272 * @param set The set the block belongs to. 273 * @return the block address. 274 */ |
275 Addr regenerateBlkAddr(Addr tag, unsigned set) const |
276 { 277 return (tag); 278 } 279 280 /** 281 *iterated through all blocks and clear all locks 282 *Needed to clear all lock tracking at once 283 */ --- 11 unchanged lines hidden (view full) --- 295 * The visitor should be a function (or object that behaves like a 296 * function) that takes a cache block reference as its parameter 297 * and returns a bool. A visitor can request the traversal to be 298 * stopped by returning false, returning true causes it to be 299 * called for the next block in the tag store. 300 * 301 * \param visitor Visitor to call on each block. 302 */ |
303 void forEachBlk(CacheBlkVisitor &visitor) M5_ATTR_OVERRIDE { |
304 for (int i = 0; i < numBlocks; i++) { 305 if (!visitor(blks[i])) 306 return; 307 } 308 } 309 310}; 311 312#endif // __MEM_CACHE_TAGS_FA_LRU_HH__ |