1/*
2 * Copyright (c) 2012-2013,2016,2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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45 * @file
46 * Declaration of a fully associative LRU tag store.
47 */
48
49#ifndef __MEM_CACHE_TAGS_FA_LRU_HH__
50#define __MEM_CACHE_TAGS_FA_LRU_HH__
51
52#include <cstdint>
53#include <string>
54#include <unordered_map>
55
56#include "base/bitfield.hh"
57#include "base/intmath.hh"
58#include "base/logging.hh"
59#include "base/statistics.hh"
60#include "base/types.hh"

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235 * @param block The block.
236 * @return the block address.
237 */
238 Addr regenerateBlkAddr(const CacheBlk* blk) const override
239 {
240 return blk->tag;
241 }
242
243 /**
244 * @todo Implement as in lru. Currently not used
245 */
246 virtual std::string print() const override { return ""; }
247
248 /**
249 * Visit each block in the tag store and apply a visitor to the
250 * block.
251 *
252 * The visitor should be a function (or object that behaves like a
253 * function) that takes a cache block reference as its parameter
254 * and returns a bool. A visitor can request the traversal to be
255 * stopped by returning false, returning true causes it to be
256 * called for the next block in the tag store.
257 *
258 * \param visitor Visitor to call on each block.
259 */
260 void forEachBlk(CacheBlkVisitor &visitor) override {
261 for (int i = 0; i < numBlocks; i++) {
262 if (!visitor(blks[i]))
263 return;
264 }
265 }
266
267 private:
268 /**
269 * Mechanism that allows us to simultaneously collect miss
270 * statistics for multiple caches. Currently, we keep track of
271 * caches from a set minimum size of interest up to the actual
272 * cache size.

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