fa_lru.cc (9214:a42caed28e1f) fa_lru.cc (9288:3d6da8559605)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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37#include <sstream>
38
39#include "base/intmath.hh"
40#include "base/misc.hh"
41#include "mem/cache/tags/fa_lru.hh"
42
43using namespace std;
44
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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37#include <sstream>
38
39#include "base/intmath.hh"
40#include "base/misc.hh"
41#include "mem/cache/tags/fa_lru.hh"
42
43using namespace std;
44
45FALRU::FALRU(unsigned _blkSize, unsigned _size, unsigned hit_latency)
45FALRU::FALRU(unsigned _blkSize, unsigned _size, Cycles hit_latency)
46 : blkSize(_blkSize), size(_size), hitLatency(hit_latency)
47{
48 if (!isPowerOf2(blkSize))
49 fatal("cache block size (in bytes) `%d' must be a power of two",
50 blkSize);
51 if (!(hitLatency > 0))
52 fatal("Access latency in cycles must be at least one cycle");
53 if (!isPowerOf2(size))

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154void
155FALRU::invalidate(FALRU::BlkType *blk)
156{
157 assert(blk);
158 tagsInUse--;
159}
160
161FALRUBlk*
46 : blkSize(_blkSize), size(_size), hitLatency(hit_latency)
47{
48 if (!isPowerOf2(blkSize))
49 fatal("cache block size (in bytes) `%d' must be a power of two",
50 blkSize);
51 if (!(hitLatency > 0))
52 fatal("Access latency in cycles must be at least one cycle");
53 if (!isPowerOf2(size))

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154void
155FALRU::invalidate(FALRU::BlkType *blk)
156{
157 assert(blk);
158 tagsInUse--;
159}
160
161FALRUBlk*
162FALRU::accessBlock(Addr addr, int &lat, int context_src, int *inCache)
162FALRU::accessBlock(Addr addr, Cycles &lat, int context_src, int *inCache)
163{
164 accesses++;
165 int tmp_in_cache = 0;
166 Addr blkAddr = blkAlign(addr);
167 FALRUBlk* blk = hashLookup(blkAddr);
168
169 if (blk && blk->isValid()) {
170 assert(blk->tag == blkAddr);

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164 accesses++;
165 int tmp_in_cache = 0;
166 Addr blkAddr = blkAlign(addr);
167 FALRUBlk* blk = hashLookup(blkAddr);
168
169 if (blk && blk->isValid()) {
170 assert(blk->tag == blkAddr);

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