1/* 2 * Copyright (c) 2018 Inria 3 * Copyright (c) 2013,2016-2018 ARM Limited 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 71 unchanged lines hidden (view full) --- 80FALRU::init(BaseCache* cache) 81{ 82 // Set parent cache 83 setCache(cache); 84 85 head = &(blks[0]); 86 head->prev = nullptr; 87 head->next = &(blks[1]); |
88 head->setPosition(0, 0); |
89 head->data = &dataBlks[0]; 90 91 for (unsigned i = 1; i < numBlocks - 1; i++) { 92 blks[i].prev = &(blks[i-1]); 93 blks[i].next = &(blks[i+1]); |
94 blks[i].setPosition(0, i); |
95 96 // Associate a data chunk to the block 97 blks[i].data = &dataBlks[blkSize*i]; 98 } 99 100 tail = &(blks[numBlocks - 1]); 101 tail->prev = &(blks[numBlocks - 2]); 102 tail->next = nullptr; |
103 tail->setPosition(0, numBlocks - 1); |
104 tail->data = &dataBlks[(numBlocks - 1) * blkSize]; 105 106 cacheTracking.init(head, tail); 107} 108 109void 110FALRU::regStats() 111{ --- 351 unchanged lines hidden --- |