base_set_assoc.hh (12679:6c416cb3ca06) base_set_assoc.hh (12684:44ebd2bc020f)
1/*
2 * Copyright (c) 2012-2014,2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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45 * Declaration of a base set associative tag store.
46 */
47
48#ifndef __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
49#define __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
50
51#include <cassert>
52#include <cstring>
1/*
2 * Copyright (c) 2012-2014,2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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45 * Declaration of a base set associative tag store.
46 */
47
48#ifndef __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
49#define __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
50
51#include <cassert>
52#include <cstring>
53#include <memory>
54#include <vector>
55
53#include <vector>
54
55#include "debug/CacheRepl.hh"
56#include "mem/cache/base.hh"
57#include "mem/cache/blk.hh"
56#include "mem/cache/base.hh"
57#include "mem/cache/blk.hh"
58#include "mem/cache/replacement_policies/base.hh"
58#include "mem/cache/tags/base.hh"
59#include "mem/cache/tags/cacheset.hh"
60#include "mem/packet.hh"
61#include "params/BaseSetAssoc.hh"
62
63/**
64 * A BaseSetAssoc cache tag store.
65 * @sa \ref gem5MemorySystem "gem5 Memory System"

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100 int tagShift;
101 /** Mask out all bits that aren't part of the set index. */
102 unsigned setMask;
103
104 /** Replacement policy */
105 BaseReplacementPolicy *replacementPolicy;
106
107 public:
59#include "mem/cache/tags/base.hh"
60#include "mem/cache/tags/cacheset.hh"
61#include "mem/packet.hh"
62#include "params/BaseSetAssoc.hh"
63
64/**
65 * A BaseSetAssoc cache tag store.
66 * @sa \ref gem5MemorySystem "gem5 Memory System"

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101 int tagShift;
102 /** Mask out all bits that aren't part of the set index. */
103 unsigned setMask;
104
105 /** Replacement policy */
106 BaseReplacementPolicy *replacementPolicy;
107
108 public:
108
109 /** Convenience typedef. */
110 typedef BaseSetAssocParams Params;
111
112 /**
113 * Construct and initialize this tag store.
114 */
115 BaseSetAssoc(const Params *p);
116
117 /**
118 * Destructor
119 */
120 virtual ~BaseSetAssoc() {};
121
122 /**
109 /** Convenience typedef. */
110 typedef BaseSetAssocParams Params;
111
112 /**
113 * Construct and initialize this tag store.
114 */
115 BaseSetAssoc(const Params *p);
116
117 /**
118 * Destructor
119 */
120 virtual ~BaseSetAssoc() {};
121
122 /**
123 * This function updates the tags when a block is invalidated but does
124 * not invalidate the block itself. It also updates the replacement data.
125 *
126 * @param blk The block to invalidate.
127 */
128 void invalidate(CacheBlk *blk) override;
129
130 /**
123 * Find the cache block given set and way
124 * @param set The set of the block.
125 * @param way The way of the block.
126 * @return The cache block.
127 */
128 CacheBlk *findBlockBySetAndWay(int set, int way) const override;
129
130 /**

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160 // apply the accessLatency on top of block->whenReady.
161 if (blk->whenReady > curTick() &&
162 cache->ticksToCycles(blk->whenReady - curTick()) >
163 accessLatency) {
164 lat = cache->ticksToCycles(blk->whenReady - curTick()) +
165 accessLatency;
166 }
167
131 * Find the cache block given set and way
132 * @param set The set of the block.
133 * @param way The way of the block.
134 * @return The cache block.
135 */
136 CacheBlk *findBlockBySetAndWay(int set, int way) const override;
137
138 /**

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168 // apply the accessLatency on top of block->whenReady.
169 if (blk->whenReady > curTick() &&
170 cache->ticksToCycles(blk->whenReady - curTick()) >
171 accessLatency) {
172 lat = cache->ticksToCycles(blk->whenReady - curTick()) +
173 accessLatency;
174 }
175
176 // Update number of references to accessed block
177 blk->refCount++;
178
168 // Update replacement data of accessed block
179 // Update replacement data of accessed block
169 replacementPolicy->touch(blk);
180 replacementPolicy->touch(blk->replacementData);
170 } else {
171 // If a cache miss
172 lat = lookupLatency;
173 }
174
175 return blk;
176 }
177

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188 /**
189 * Find replacement victim based on address.
190 *
191 * @param addr Address to find a victim for.
192 * @return Cache block to be replaced.
193 */
194 CacheBlk* findVictim(Addr addr) override
195 {
181 } else {
182 // If a cache miss
183 lat = lookupLatency;
184 }
185
186 return blk;
187 }
188

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199 /**
200 * Find replacement victim based on address.
201 *
202 * @param addr Address to find a victim for.
203 * @return Cache block to be replaced.
204 */
205 CacheBlk* findVictim(Addr addr) override
206 {
207 // Get possible locations for the victim block
208 std::vector<CacheBlk*> locations = getPossibleLocations(addr);
209
196 // Choose replacement victim from replacement candidates
210 // Choose replacement victim from replacement candidates
197 return replacementPolicy->getVictim(getPossibleLocations(addr));
211 CacheBlk* victim = static_cast<CacheBlk*>(replacementPolicy->getVictim(
212 std::vector<ReplaceableEntry*>(
213 locations.begin(), locations.end())));
214
215 DPRINTF(CacheRepl, "set %x, way %x: selecting blk for replacement\n",
216 victim->set, victim->way);
217
218 return victim;
198 }
199
200 /**
201 * Find all possible block locations for insertion and replacement of
202 * an address. Should be called immediately before ReplacementPolicy's
203 * findVictim() not to break cache resizing.
204 * Returns blocks in all ways belonging to the set of the address.
205 *

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218 * @param blk The block to update.
219 */
220 void insertBlock(PacketPtr pkt, CacheBlk *blk) override
221 {
222 // Insert block
223 BaseTags::insertBlock(pkt, blk);
224
225 // Update replacement policy
219 }
220
221 /**
222 * Find all possible block locations for insertion and replacement of
223 * an address. Should be called immediately before ReplacementPolicy's
224 * findVictim() not to break cache resizing.
225 * Returns blocks in all ways belonging to the set of the address.
226 *

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239 * @param blk The block to update.
240 */
241 void insertBlock(PacketPtr pkt, CacheBlk *blk) override
242 {
243 // Insert block
244 BaseTags::insertBlock(pkt, blk);
245
246 // Update replacement policy
226 replacementPolicy->reset(blk);
247 replacementPolicy->reset(blk->replacementData);
227 }
228
229 /**
230 * Limit the allocation for the cache ways.
231 * @param ways The maximum number of ways available for replacement.
232 */
233 virtual void setWayAllocationMax(int ways) override
234 {

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249
250 /**
251 * Limit the allocation for the cache ways.
252 * @param ways The maximum number of ways available for replacement.
253 */
254 virtual void setWayAllocationMax(int ways) override
255 {

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