base_set_assoc.hh (12554:86264baddf36) base_set_assoc.hh (12555:4ecdaa830686)
1/*
2 * Copyright (c) 2012-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 147 unchanged lines hidden (view full) ---

156 * side effect.
157 * @param addr The address to find.
158 * @param is_secure True if the target memory space is secure.
159 * @param lat The access latency.
160 * @return Pointer to the cache block if found.
161 */
162 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override
163 {
1/*
2 * Copyright (c) 2012-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 147 unchanged lines hidden (view full) ---

156 * side effect.
157 * @param addr The address to find.
158 * @param is_secure True if the target memory space is secure.
159 * @param lat The access latency.
160 * @return Pointer to the cache block if found.
161 */
162 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override
163 {
164 Addr tag = extractTag(addr);
165 int set = extractSet(addr);
166 BlkType *blk = sets[set].findBlk(tag, is_secure);
164 BlkType *blk = findBlock(addr, is_secure);
167
168 // Access all tags in parallel, hence one in each way. The data side
169 // either accesses all blocks in parallel, or one block sequentially on
170 // a hit. Sequential access with a miss doesn't access data.
171 tagAccesses += allocAssoc;
172 if (sequentialAccess) {
173 if (blk != nullptr) {
174 dataAccesses += 1;

--- 193 unchanged lines hidden --- 		165
166 // Access all tags in parallel, hence one in each way. The data side
167 // either accesses all blocks in parallel, or one block sequentially on
168 // a hit. Sequential access with a miss doesn't access data.
169 tagAccesses += allocAssoc;
170 if (sequentialAccess) {
171 if (blk != nullptr) {
172 dataAccesses += 1;

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