1/* 2 * Copyright (c) 2012-2014,2017 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 46 unchanged lines hidden (view full) --- 55#include "base/logging.hh" 56#include "base/types.hh" 57#include "mem/cache/base.hh" 58#include "mem/cache/cache_blk.hh" 59#include "mem/cache/replacement_policies/base.hh" 60#include "mem/cache/replacement_policies/replaceable_entry.hh" 61#include "mem/cache/tags/base.hh" 62#include "mem/cache/tags/indexing_policies/base.hh" |
63#include "mem/packet.hh" |
64#include "params/BaseSetAssoc.hh" 65 66/** 67 * A basic cache tag store. 68 * @sa \ref gem5MemorySystem "gem5 Memory System" 69 * 70 * The BaseSetAssoc placement policy divides the cache into s sets of w 71 * cache lines (ways). --- 106 unchanged lines hidden (view full) --- 178 evict_blks.push_back(victim); 179 180 return victim; 181 } 182 183 /** 184 * Insert the new block into the cache and update replacement data. 185 * |
186 * @param pkt Packet holding the address to update |
187 * @param blk The block to update. 188 */ |
189 void insertBlock(const PacketPtr pkt, CacheBlk *blk) override |
190 { 191 // Insert block |
192 BaseTags::insertBlock(pkt, blk); |
193 194 // Increment tag counter 195 tagsInUse++; 196 197 // Update replacement policy 198 replacementPolicy->reset(blk->replacementData); 199 } 200 --- 47 unchanged lines hidden --- |