1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Erik Hallnor
41 * Ron Dreslinski
42 */
43
44/**
45 * @file
46 * Declaration of a common base class for cache tagstore objects.
47 */
48
49#ifndef __BASE_TAGS_HH__
50#define __BASE_TAGS_HH__
51
52#include <string>
53
54#include "base/callback.hh"
55#include "base/statistics.hh"
56#include "params/BaseTags.hh"
57#include "sim/clocked_object.hh"
58
59class BaseCache;
60
61/**
62 * A common base class of Cache tagstore objects.
63 */
64class BaseTags : public ClockedObject
65{
66 protected:
67 /** The block size of the cache. */
68 const unsigned blkSize;
69 /** The size of the cache. */
70 const unsigned size;
71 /** The hit latency of the cache. */
72 const Cycles hitLatency;
73
74 /** Pointer to the parent cache. */
75 BaseCache *cache;
76
77 /**
78 * The number of tags that need to be touched to meet the warmup
79 * percentage.
80 */
81 int warmupBound;
82 /** Marked true when the cache is warmed up. */
83 bool warmedUp;
84
85 /** the number of blocks in the cache */
86 unsigned numBlocks;
87
88 // Statistics
89 /**
90 * @addtogroup CacheStatistics
91 * @{
92 */
93
94 /** Number of replacements of valid blocks per thread. */
95 Stats::Vector replacements;
96 /** Per cycle average of the number of tags that hold valid data. */
97 Stats::Average tagsInUse;
98
99 /** The total number of references to a block before it is replaced. */
100 Stats::Scalar totalRefs;
101
102 /**
103 * The number of reference counts sampled. This is different from
104 * replacements because we sample all the valid blocks when the simulator
105 * exits.
106 */
107 Stats::Scalar sampledRefs;
108
109 /**
110 * Average number of references to a block before is was replaced.
111 * @todo This should change to an average stat once we have them.
112 */
113 Stats::Formula avgRefs;
114
115 /** The cycle that the warmup percentage was hit. */
116 Stats::Scalar warmupCycle;
117
118 /** Average occupancy of each requestor using the cache */
119 Stats::AverageVector occupancies;
120
121 /** Average occ % of each requestor using the cache */
122 Stats::Formula avgOccs;
123
124 /** Occupancy of each context/cpu using the cache */
125 Stats::Vector occupanciesTaskId;
126
127 /** Occupancy of each context/cpu using the cache */
128 Stats::Vector2d ageTaskId;
129
130 /** Occ % of each context/cpu using the cache */
131 Stats::Formula percentOccsTaskId;
132
| 1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Erik Hallnor
41 * Ron Dreslinski
42 */
43
44/**
45 * @file
46 * Declaration of a common base class for cache tagstore objects.
47 */
48
49#ifndef __BASE_TAGS_HH__
50#define __BASE_TAGS_HH__
51
52#include <string>
53
54#include "base/callback.hh"
55#include "base/statistics.hh"
56#include "params/BaseTags.hh"
57#include "sim/clocked_object.hh"
58
59class BaseCache;
60
61/**
62 * A common base class of Cache tagstore objects.
63 */
64class BaseTags : public ClockedObject
65{
66 protected:
67 /** The block size of the cache. */
68 const unsigned blkSize;
69 /** The size of the cache. */
70 const unsigned size;
71 /** The hit latency of the cache. */
72 const Cycles hitLatency;
73
74 /** Pointer to the parent cache. */
75 BaseCache *cache;
76
77 /**
78 * The number of tags that need to be touched to meet the warmup
79 * percentage.
80 */
81 int warmupBound;
82 /** Marked true when the cache is warmed up. */
83 bool warmedUp;
84
85 /** the number of blocks in the cache */
86 unsigned numBlocks;
87
88 // Statistics
89 /**
90 * @addtogroup CacheStatistics
91 * @{
92 */
93
94 /** Number of replacements of valid blocks per thread. */
95 Stats::Vector replacements;
96 /** Per cycle average of the number of tags that hold valid data. */
97 Stats::Average tagsInUse;
98
99 /** The total number of references to a block before it is replaced. */
100 Stats::Scalar totalRefs;
101
102 /**
103 * The number of reference counts sampled. This is different from
104 * replacements because we sample all the valid blocks when the simulator
105 * exits.
106 */
107 Stats::Scalar sampledRefs;
108
109 /**
110 * Average number of references to a block before is was replaced.
111 * @todo This should change to an average stat once we have them.
112 */
113 Stats::Formula avgRefs;
114
115 /** The cycle that the warmup percentage was hit. */
116 Stats::Scalar warmupCycle;
117
118 /** Average occupancy of each requestor using the cache */
119 Stats::AverageVector occupancies;
120
121 /** Average occ % of each requestor using the cache */
122 Stats::Formula avgOccs;
123
124 /** Occupancy of each context/cpu using the cache */
125 Stats::Vector occupanciesTaskId;
126
127 /** Occupancy of each context/cpu using the cache */
128 Stats::Vector2d ageTaskId;
129
130 /** Occ % of each context/cpu using the cache */
131 Stats::Formula percentOccsTaskId;
132
|