1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Erik Hallnor
41 * Ron Dreslinski
42 */
43
44/**
45 * @file
46 * Declaration of a common base class for cache tagstore objects.
47 */
48
49#ifndef __BASE_TAGS_HH__
50#define __BASE_TAGS_HH__
51
52#include <string>
53
54#include "base/callback.hh"
55#include "base/statistics.hh"
56#include "params/BaseTags.hh"
57#include "sim/clocked_object.hh"
58
59class BaseCache;
60
61/**
62 * A common base class of Cache tagstore objects.
63 */
64class BaseTags : public ClockedObject
65{
66 protected:
67 /** The block size of the cache. */
68 const unsigned blkSize;
69 /** The size of the cache. */
70 const unsigned size;
71 /** The access latency of the cache. */
72 const Cycles accessLatency;
73 /** Pointer to the parent cache. */
74 BaseCache *cache;
75
76 /**
77 * The number of tags that need to be touched to meet the warmup
78 * percentage.
79 */
80 int warmupBound;
81 /** Marked true when the cache is warmed up. */
82 bool warmedUp;
83
84 /** the number of blocks in the cache */
85 unsigned numBlocks;
86
87 // Statistics
88 /**
89 * @addtogroup CacheStatistics
90 * @{
91 */
92
93 /** Number of replacements of valid blocks per thread. */
94 Stats::Vector replacements;
95 /** Per cycle average of the number of tags that hold valid data. */
96 Stats::Average tagsInUse;
97
98 /** The total number of references to a block before it is replaced. */
99 Stats::Scalar totalRefs;
100
101 /**
102 * The number of reference counts sampled. This is different from
103 * replacements because we sample all the valid blocks when the simulator
104 * exits.
105 */
106 Stats::Scalar sampledRefs;
107
108 /**
109 * Average number of references to a block before is was replaced.
110 * @todo This should change to an average stat once we have them.
111 */
112 Stats::Formula avgRefs;
113
114 /** The cycle that the warmup percentage was hit. */
115 Stats::Scalar warmupCycle;
116
117 /** Average occupancy of each requestor using the cache */
118 Stats::AverageVector occupancies;
119
120 /** Average occ % of each requestor using the cache */
121 Stats::Formula avgOccs;
122
123 /** Occupancy of each context/cpu using the cache */
124 Stats::Vector occupanciesTaskId;
125
126 /** Occupancy of each context/cpu using the cache */
127 Stats::Vector2d ageTaskId;
128
129 /** Occ % of each context/cpu using the cache */
130 Stats::Formula percentOccsTaskId;
131
132 /** Number of tags consulted over all accesses. */
133 Stats::Scalar tagAccesses;
134 /** Number of data blocks consulted over all accesses. */
135 Stats::Scalar dataAccesses;
136
137 /**
138 * @}
139 */
140
141 public:
142 typedef BaseTagsParams Params;
143 BaseTags(const Params *p);
144
145 /**
146 * Destructor.
147 */
148 virtual ~BaseTags() {}
149
150 /**
151 * Set the parent cache back pointer.
152 * @param _cache Pointer to parent cache.
153 */
154 void setCache(BaseCache *_cache);
155
156 /**
157 * Register local statistics.
158 */
159 void regStats();
160
161 /**
162 * Average in the reference count for valid blocks when the simulation
163 * exits.
164 */
165 virtual void cleanupRefs() {}
166
167 /**
168 * Computes stats just prior to dump event
169 */
170 virtual void computeStats() {}
171
172 /**
173 *iterated through all blocks and clear all locks
174 *Needed to clear all lock tracking at once
175 */
176 virtual void clearLocks() {}
177
178 /**
179 * Print all tags used
180 */
181 virtual std::string print() const = 0;
182};
183
184class BaseTagsCallback : public Callback
185{
186 BaseTags *tags;
187 public:
188 BaseTagsCallback(BaseTags *t) : tags(t) {}
189 virtual void process() { tags->cleanupRefs(); };
190};
191
192class BaseTagsDumpCallback : public Callback
193{
194 BaseTags *tags;
195 public:
196 BaseTagsDumpCallback(BaseTags *t) : tags(t) {}
197 virtual void process() { tags->computeStats(); };
198};
199
200#endif //__BASE_TAGS_HH__