base.cc (13218:5e7df60c6cab) | base.cc (13219:454ecc63338d) |
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1/* 2 * Copyright (c) 2013,2016,2018 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 38 unchanged lines hidden (view full) --- 47 */ 48 49#include "mem/cache/tags/base.hh" 50 51#include <cassert> 52 53#include "base/types.hh" 54#include "mem/cache/base.hh" | 1/* 2 * Copyright (c) 2013,2016,2018 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 38 unchanged lines hidden (view full) --- 47 */ 48 49#include "mem/cache/tags/base.hh" 50 51#include <cassert> 52 53#include "base/types.hh" 54#include "mem/cache/base.hh" |
55#include "mem/cache/tags/indexing_policies/base.hh" |
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55#include "mem/request.hh" 56#include "sim/core.hh" 57#include "sim/sim_exit.hh" 58#include "sim/system.hh" 59 60BaseTags::BaseTags(const Params *p) 61 : ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1), 62 size(p->size), 63 lookupLatency(p->tag_latency), 64 accessLatency(p->sequential_access ? 65 p->tag_latency + p->data_latency : 66 std::max(p->tag_latency, p->data_latency)), | 56#include "mem/request.hh" 57#include "sim/core.hh" 58#include "sim/sim_exit.hh" 59#include "sim/system.hh" 60 61BaseTags::BaseTags(const Params *p) 62 : ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1), 63 size(p->size), 64 lookupLatency(p->tag_latency), 65 accessLatency(p->sequential_access ? 66 p->tag_latency + p->data_latency : 67 std::max(p->tag_latency, p->data_latency)), |
67 cache(nullptr), | 68 cache(nullptr), indexingPolicy(p->indexing_policy), |
68 warmupBound((p->warmup_percentage/100.0) * (p->size / p->block_size)), 69 warmedUp(false), numBlocks(p->size / p->block_size), 70 dataBlks(new uint8_t[p->size]) // Allocate data storage in one big chunk 71{ 72} 73 74void 75BaseTags::setCache(BaseCache *_cache) 76{ 77 assert(!cache); 78 cache = _cache; 79} 80 | 69 warmupBound((p->warmup_percentage/100.0) * (p->size / p->block_size)), 70 warmedUp(false), numBlocks(p->size / p->block_size), 71 dataBlks(new uint8_t[p->size]) // Allocate data storage in one big chunk 72{ 73} 74 75void 76BaseTags::setCache(BaseCache *_cache) 77{ 78 assert(!cache); 79 cache = _cache; 80} 81 |
81std::vector<ReplaceableEntry*> 82BaseTags::getPossibleLocations(const Addr addr) const | 82ReplaceableEntry* 83BaseTags::findBlockBySetAndWay(int set, int way) const |
83{ | 84{ |
84 panic("Unimplemented getPossibleLocations for tags subclass"); | 85 return indexingPolicy->getEntry(set, way); |
85} 86 87CacheBlk* 88BaseTags::findBlock(Addr addr, bool is_secure) const 89{ 90 // Extract block tag 91 Addr tag = extractTag(addr); 92 | 86} 87 88CacheBlk* 89BaseTags::findBlock(Addr addr, bool is_secure) const 90{ 91 // Extract block tag 92 Addr tag = extractTag(addr); 93 |
93 // Find possible locations for the given address 94 const std::vector<ReplaceableEntry*> locations = 95 getPossibleLocations(addr); | 94 // Find possible entries that may contain the given address 95 const std::vector<ReplaceableEntry*> entries = 96 indexingPolicy->getPossibleEntries(addr); |
96 97 // Search for block | 97 98 // Search for block |
98 for (const auto& location : locations) { | 99 for (const auto& location : entries) { |
99 CacheBlk* blk = static_cast<CacheBlk*>(location); 100 if ((blk->tag == tag) && blk->isValid() && 101 (blk->isSecure() == is_secure)) { 102 return blk; 103 } 104 } 105 106 // Did not find block --- 22 unchanged lines hidden (view full) --- 129 warmupCycle = curTick(); 130 } 131 132 // We only need to write into one tag and one data block. 133 tagAccesses += 1; 134 dataAccesses += 1; 135} 136 | 100 CacheBlk* blk = static_cast<CacheBlk*>(location); 101 if ((blk->tag == tag) && blk->isValid() && 102 (blk->isSecure() == is_secure)) { 103 return blk; 104 } 105 } 106 107 // Did not find block --- 22 unchanged lines hidden (view full) --- 130 warmupCycle = curTick(); 131 } 132 133 // We only need to write into one tag and one data block. 134 tagAccesses += 1; 135 dataAccesses += 1; 136} 137 |
138Addr 139BaseTags::extractTag(const Addr addr) const 140{ 141 return indexingPolicy->extractTag(addr); 142} 143 |
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137void 138BaseTags::cleanupRefsVisitor(CacheBlk &blk) 139{ 140 if (blk.isValid()) { 141 totalRefs += blk.refCount; 142 ++sampledRefs; 143 } 144} --- 153 unchanged lines hidden --- | 144void 145BaseTags::cleanupRefsVisitor(CacheBlk &blk) 146{ 147 if (blk.isValid()) { 148 totalRefs += blk.refCount; 149 ++sampledRefs; 150 } 151} --- 153 unchanged lines hidden --- |