1/*
2 * Copyright (c) 2013,2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Erik Hallnor
41 * Ron Dreslinski
42 */
43
44/**
45 * @file
46 * Definitions of BaseTags.
47 */
48
49#include "mem/cache/tags/base.hh"
50
51#include "mem/cache/base.hh"
52#include "sim/sim_exit.hh"
53
54BaseTags::BaseTags(const Params *p)
55 : ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1),
56 size(p->size),
57 lookupLatency(p->tag_latency),
58 accessLatency(p->sequential_access ?
59 p->tag_latency + p->data_latency :
60 std::max(p->tag_latency, p->data_latency)),
61 cache(nullptr),
62 warmupBound((p->warmup_percentage/100.0) * (p->size / p->block_size)),
63 warmedUp(false), numBlocks(p->size / p->block_size),
64 dataBlks(new uint8_t[p->size]) // Allocate data storage in one big chunk
65{
66}
67
68void
69BaseTags::setCache(BaseCache *_cache)
70{
71 assert(!cache);
72 cache = _cache;
73}
74
75void
76BaseTags::insertBlock(PacketPtr pkt, CacheBlk *blk)
77{
78 // Get address
79 Addr addr = pkt->getAddr();
80
| 1/*
2 * Copyright (c) 2013,2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Erik Hallnor
41 * Ron Dreslinski
42 */
43
44/**
45 * @file
46 * Definitions of BaseTags.
47 */
48
49#include "mem/cache/tags/base.hh"
50
51#include "mem/cache/base.hh"
52#include "sim/sim_exit.hh"
53
54BaseTags::BaseTags(const Params *p)
55 : ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1),
56 size(p->size),
57 lookupLatency(p->tag_latency),
58 accessLatency(p->sequential_access ?
59 p->tag_latency + p->data_latency :
60 std::max(p->tag_latency, p->data_latency)),
61 cache(nullptr),
62 warmupBound((p->warmup_percentage/100.0) * (p->size / p->block_size)),
63 warmedUp(false), numBlocks(p->size / p->block_size),
64 dataBlks(new uint8_t[p->size]) // Allocate data storage in one big chunk
65{
66}
67
68void
69BaseTags::setCache(BaseCache *_cache)
70{
71 assert(!cache);
72 cache = _cache;
73}
74
75void
76BaseTags::insertBlock(PacketPtr pkt, CacheBlk *blk)
77{
78 // Get address
79 Addr addr = pkt->getAddr();
80
|
89 // If we're replacing a block that was previously valid update
90 // stats for it. This can't be done in findBlock() because a
91 // found block might not actually be replaced there if the
92 // coherence protocol says it can't be.
93 if (blk->isValid()) {
94 totalRefs += blk->refCount;
95 ++sampledRefs;
96
97 invalidate(blk);
98 blk->invalidate();
99 }
100
101 // Previous block, if existed, has been removed, and now we have
102 // to insert the new one
| 81 // If we're replacing a block that was previously valid update
82 // stats for it. This can't be done in findBlock() because a
83 // found block might not actually be replaced there if the
84 // coherence protocol says it can't be.
85 if (blk->isValid()) {
86 totalRefs += blk->refCount;
87 ++sampledRefs;
88
89 invalidate(blk);
90 blk->invalidate();
91 }
92
93 // Previous block, if existed, has been removed, and now we have
94 // to insert the new one
|
104
105 // Deal with what we are bringing in
106 MasterID master_id = pkt->req->masterId();
107 assert(master_id < cache->system->maxMasters());
108 occupancies[master_id]++;
109
110 // Insert block with tag, src master id and task id
111 blk->insert(extractTag(addr), pkt->isSecure(), master_id,
112 pkt->req->taskId());
113
| 95
96 // Deal with what we are bringing in
97 MasterID master_id = pkt->req->masterId();
98 assert(master_id < cache->system->maxMasters());
99 occupancies[master_id]++;
100
101 // Insert block with tag, src master id and task id
102 blk->insert(extractTag(addr), pkt->isSecure(), master_id,
103 pkt->req->taskId());
104
|
114 // We only need to write into one tag and one data block.
115 tagAccesses += 1;
116 dataAccesses += 1;
117}
118
119void
120BaseTags::regStats()
121{
122 ClockedObject::regStats();
123
124 using namespace Stats;
125
126 tagsInUse
127 .name(name() + ".tagsinuse")
128 .desc("Cycle average of tags in use")
129 ;
130
131 totalRefs
132 .name(name() + ".total_refs")
133 .desc("Total number of references to valid blocks.")
134 ;
135
136 sampledRefs
137 .name(name() + ".sampled_refs")
138 .desc("Sample count of references to valid blocks.")
139 ;
140
141 avgRefs
142 .name(name() + ".avg_refs")
143 .desc("Average number of references to valid blocks.")
144 ;
145
146 avgRefs = totalRefs/sampledRefs;
147
148 warmupCycle
149 .name(name() + ".warmup_cycle")
150 .desc("Cycle when the warmup percentage was hit.")
151 ;
152
153 occupancies
154 .init(cache->system->maxMasters())
155 .name(name() + ".occ_blocks")
156 .desc("Average occupied blocks per requestor")
157 .flags(nozero | nonan)
158 ;
159 for (int i = 0; i < cache->system->maxMasters(); i++) {
160 occupancies.subname(i, cache->system->getMasterName(i));
161 }
162
163 avgOccs
164 .name(name() + ".occ_percent")
165 .desc("Average percentage of cache occupancy")
166 .flags(nozero | total)
167 ;
168 for (int i = 0; i < cache->system->maxMasters(); i++) {
169 avgOccs.subname(i, cache->system->getMasterName(i));
170 }
171
172 avgOccs = occupancies / Stats::constant(numBlocks);
173
174 occupanciesTaskId
175 .init(ContextSwitchTaskId::NumTaskId)
176 .name(name() + ".occ_task_id_blocks")
177 .desc("Occupied blocks per task id")
178 .flags(nozero | nonan)
179 ;
180
181 ageTaskId
182 .init(ContextSwitchTaskId::NumTaskId, 5)
183 .name(name() + ".age_task_id_blocks")
184 .desc("Occupied blocks per task id")
185 .flags(nozero | nonan)
186 ;
187
188 percentOccsTaskId
189 .name(name() + ".occ_task_id_percent")
190 .desc("Percentage of cache occupancy per task id")
191 .flags(nozero)
192 ;
193
194 percentOccsTaskId = occupanciesTaskId / Stats::constant(numBlocks);
195
196 tagAccesses
197 .name(name() + ".tag_accesses")
198 .desc("Number of tag accesses")
199 ;
200
201 dataAccesses
202 .name(name() + ".data_accesses")
203 .desc("Number of data accesses")
204 ;
205
206 registerDumpCallback(new BaseTagsDumpCallback(this));
207 registerExitCallback(new BaseTagsCallback(this));
208}
| 111 // We only need to write into one tag and one data block.
112 tagAccesses += 1;
113 dataAccesses += 1;
114}
115
116void
117BaseTags::regStats()
118{
119 ClockedObject::regStats();
120
121 using namespace Stats;
122
123 tagsInUse
124 .name(name() + ".tagsinuse")
125 .desc("Cycle average of tags in use")
126 ;
127
128 totalRefs
129 .name(name() + ".total_refs")
130 .desc("Total number of references to valid blocks.")
131 ;
132
133 sampledRefs
134 .name(name() + ".sampled_refs")
135 .desc("Sample count of references to valid blocks.")
136 ;
137
138 avgRefs
139 .name(name() + ".avg_refs")
140 .desc("Average number of references to valid blocks.")
141 ;
142
143 avgRefs = totalRefs/sampledRefs;
144
145 warmupCycle
146 .name(name() + ".warmup_cycle")
147 .desc("Cycle when the warmup percentage was hit.")
148 ;
149
150 occupancies
151 .init(cache->system->maxMasters())
152 .name(name() + ".occ_blocks")
153 .desc("Average occupied blocks per requestor")
154 .flags(nozero | nonan)
155 ;
156 for (int i = 0; i < cache->system->maxMasters(); i++) {
157 occupancies.subname(i, cache->system->getMasterName(i));
158 }
159
160 avgOccs
161 .name(name() + ".occ_percent")
162 .desc("Average percentage of cache occupancy")
163 .flags(nozero | total)
164 ;
165 for (int i = 0; i < cache->system->maxMasters(); i++) {
166 avgOccs.subname(i, cache->system->getMasterName(i));
167 }
168
169 avgOccs = occupancies / Stats::constant(numBlocks);
170
171 occupanciesTaskId
172 .init(ContextSwitchTaskId::NumTaskId)
173 .name(name() + ".occ_task_id_blocks")
174 .desc("Occupied blocks per task id")
175 .flags(nozero | nonan)
176 ;
177
178 ageTaskId
179 .init(ContextSwitchTaskId::NumTaskId, 5)
180 .name(name() + ".age_task_id_blocks")
181 .desc("Occupied blocks per task id")
182 .flags(nozero | nonan)
183 ;
184
185 percentOccsTaskId
186 .name(name() + ".occ_task_id_percent")
187 .desc("Percentage of cache occupancy per task id")
188 .flags(nozero)
189 ;
190
191 percentOccsTaskId = occupanciesTaskId / Stats::constant(numBlocks);
192
193 tagAccesses
194 .name(name() + ".tag_accesses")
195 .desc("Number of tag accesses")
196 ;
197
198 dataAccesses
199 .name(name() + ".data_accesses")
200 .desc("Number of data accesses")
201 ;
202
203 registerDumpCallback(new BaseTagsDumpCallback(this));
204 registerExitCallback(new BaseTagsCallback(this));
205}
|