1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Erik Hallnor
41 * Ron Dreslinski
42 */
43
44/**
45 * @file
46 * Definitions of BaseTags.
47 */
48
49#include "config/the_isa.hh"
50#include "cpu/smt.hh" //maxThreadsPerCPU
51#include "mem/cache/tags/base.hh"
52#include "mem/cache/base.hh"
53#include "sim/sim_exit.hh"
54
55using namespace std;
56
57BaseTags::BaseTags(const Params *p)
58 : ClockedObject(p), blkSize(p->block_size), size(p->size),
| 1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Erik Hallnor
41 * Ron Dreslinski
42 */
43
44/**
45 * @file
46 * Definitions of BaseTags.
47 */
48
49#include "config/the_isa.hh"
50#include "cpu/smt.hh" //maxThreadsPerCPU
51#include "mem/cache/tags/base.hh"
52#include "mem/cache/base.hh"
53#include "sim/sim_exit.hh"
54
55using namespace std;
56
57BaseTags::BaseTags(const Params *p)
58 : ClockedObject(p), blkSize(p->block_size), size(p->size),
|
66 cache = _cache;
67}
68
69void
70BaseTags::regStats()
71{
72 using namespace Stats;
73 replacements
74 .init(maxThreadsPerCPU)
75 .name(name() + ".replacements")
76 .desc("number of replacements")
77 .flags(total)
78 ;
79
80 tagsInUse
81 .name(name() + ".tagsinuse")
82 .desc("Cycle average of tags in use")
83 ;
84
85 totalRefs
86 .name(name() + ".total_refs")
87 .desc("Total number of references to valid blocks.")
88 ;
89
90 sampledRefs
91 .name(name() + ".sampled_refs")
92 .desc("Sample count of references to valid blocks.")
93 ;
94
95 avgRefs
96 .name(name() + ".avg_refs")
97 .desc("Average number of references to valid blocks.")
98 ;
99
100 avgRefs = totalRefs/sampledRefs;
101
102 warmupCycle
103 .name(name() + ".warmup_cycle")
104 .desc("Cycle when the warmup percentage was hit.")
105 ;
106
107 occupancies
108 .init(cache->system->maxMasters())
109 .name(name() + ".occ_blocks")
110 .desc("Average occupied blocks per requestor")
111 .flags(nozero | nonan)
112 ;
113 for (int i = 0; i < cache->system->maxMasters(); i++) {
114 occupancies.subname(i, cache->system->getMasterName(i));
115 }
116
117 avgOccs
118 .name(name() + ".occ_percent")
119 .desc("Average percentage of cache occupancy")
120 .flags(nozero | total)
121 ;
122 for (int i = 0; i < cache->system->maxMasters(); i++) {
123 avgOccs.subname(i, cache->system->getMasterName(i));
124 }
125
126 avgOccs = occupancies / Stats::constant(numBlocks);
127
128 occupanciesTaskId
129 .init(ContextSwitchTaskId::NumTaskId)
130 .name(name() + ".occ_task_id_blocks")
131 .desc("Occupied blocks per task id")
132 .flags(nozero | nonan)
133 ;
134
135 ageTaskId
136 .init(ContextSwitchTaskId::NumTaskId, 5)
137 .name(name() + ".age_task_id_blocks")
138 .desc("Occupied blocks per task id")
139 .flags(nozero | nonan)
140 ;
141
142 percentOccsTaskId
143 .name(name() + ".occ_task_id_percent")
144 .desc("Percentage of cache occupancy per task id")
145 .flags(nozero)
146 ;
147
148 percentOccsTaskId = occupanciesTaskId / Stats::constant(numBlocks);
149
150 tagAccesses
151 .name(name() + ".tag_accesses")
152 .desc("Number of tag accesses")
153 ;
154
155 dataAccesses
156 .name(name() + ".data_accesses")
157 .desc("Number of data accesses")
158 ;
159
160 registerDumpCallback(new BaseTagsDumpCallback(this));
161 registerExitCallback(new BaseTagsCallback(this));
162}
| 68 cache = _cache;
69}
70
71void
72BaseTags::regStats()
73{
74 using namespace Stats;
75 replacements
76 .init(maxThreadsPerCPU)
77 .name(name() + ".replacements")
78 .desc("number of replacements")
79 .flags(total)
80 ;
81
82 tagsInUse
83 .name(name() + ".tagsinuse")
84 .desc("Cycle average of tags in use")
85 ;
86
87 totalRefs
88 .name(name() + ".total_refs")
89 .desc("Total number of references to valid blocks.")
90 ;
91
92 sampledRefs
93 .name(name() + ".sampled_refs")
94 .desc("Sample count of references to valid blocks.")
95 ;
96
97 avgRefs
98 .name(name() + ".avg_refs")
99 .desc("Average number of references to valid blocks.")
100 ;
101
102 avgRefs = totalRefs/sampledRefs;
103
104 warmupCycle
105 .name(name() + ".warmup_cycle")
106 .desc("Cycle when the warmup percentage was hit.")
107 ;
108
109 occupancies
110 .init(cache->system->maxMasters())
111 .name(name() + ".occ_blocks")
112 .desc("Average occupied blocks per requestor")
113 .flags(nozero | nonan)
114 ;
115 for (int i = 0; i < cache->system->maxMasters(); i++) {
116 occupancies.subname(i, cache->system->getMasterName(i));
117 }
118
119 avgOccs
120 .name(name() + ".occ_percent")
121 .desc("Average percentage of cache occupancy")
122 .flags(nozero | total)
123 ;
124 for (int i = 0; i < cache->system->maxMasters(); i++) {
125 avgOccs.subname(i, cache->system->getMasterName(i));
126 }
127
128 avgOccs = occupancies / Stats::constant(numBlocks);
129
130 occupanciesTaskId
131 .init(ContextSwitchTaskId::NumTaskId)
132 .name(name() + ".occ_task_id_blocks")
133 .desc("Occupied blocks per task id")
134 .flags(nozero | nonan)
135 ;
136
137 ageTaskId
138 .init(ContextSwitchTaskId::NumTaskId, 5)
139 .name(name() + ".age_task_id_blocks")
140 .desc("Occupied blocks per task id")
141 .flags(nozero | nonan)
142 ;
143
144 percentOccsTaskId
145 .name(name() + ".occ_task_id_percent")
146 .desc("Percentage of cache occupancy per task id")
147 .flags(nozero)
148 ;
149
150 percentOccsTaskId = occupanciesTaskId / Stats::constant(numBlocks);
151
152 tagAccesses
153 .name(name() + ".tag_accesses")
154 .desc("Number of tag accesses")
155 ;
156
157 dataAccesses
158 .name(name() + ".data_accesses")
159 .desc("Number of data accesses")
160 ;
161
162 registerDumpCallback(new BaseTagsDumpCallback(this));
163 registerExitCallback(new BaseTagsCallback(this));
164}
|