Tags.py (9814:7ad2b0186a32) Tags.py (10025:fdf737112e46)
1# Copyright (c) 2012-2013 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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53 hit_latency = Param.Cycles(Parent.hit_latency,
54 "The hit latency for this cache")
55
56class LRU(BaseTags):
57 type = 'LRU'
58 cxx_class = 'LRU'
59 cxx_header = "mem/cache/tags/lru.hh"
60 assoc = Param.Int(Parent.assoc, "associativity")
1# Copyright (c) 2012-2013 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 44 unchanged lines hidden (view full) ---

53 hit_latency = Param.Cycles(Parent.hit_latency,
54 "The hit latency for this cache")
55
56class LRU(BaseTags):
57 type = 'LRU'
58 cxx_class = 'LRU'
59 cxx_header = "mem/cache/tags/lru.hh"
60 assoc = Param.Int(Parent.assoc, "associativity")
61 sequential_access = Param.Bool(Parent.sequential_access,
62 "Whether to access tags and data sequentially")
61
62class FALRU(BaseTags):
63 type = 'FALRU'
64 cxx_class = 'FALRU'
65 cxx_header = "mem/cache/tags/fa_lru.hh"
63
64class FALRU(BaseTags):
65 type = 'FALRU'
66 cxx_class = 'FALRU'
67 cxx_header = "mem/cache/tags/fa_lru.hh"