1# Copyright (c) 2012-2013 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Prakash Ramrakhyani
37
38from m5.params import *
39from m5.proxy import *
40from ClockedObject import ClockedObject
| 1# Copyright (c) 2012-2013 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Prakash Ramrakhyani
37
38from m5.params import *
39from m5.proxy import *
40from ClockedObject import ClockedObject
|
| 41from IndexingPolicies import *
|
41
42class BaseTags(ClockedObject):
43 type = 'BaseTags'
44 abstract = True
45 cxx_header = "mem/cache/tags/base.hh"
46 # Get the size from the parent (cache)
47 size = Param.MemorySize(Parent.size, "capacity in bytes")
48
49 # Get the block size from the parent (system)
50 block_size = Param.Int(Parent.cache_line_size, "block size in bytes")
51
52 # Get the tag lookup latency from the parent (cache)
53 tag_latency = Param.Cycles(Parent.tag_latency,
54 "The tag lookup latency for this cache")
55
56 # Get the RAM access latency from the parent (cache)
57 data_latency = Param.Cycles(Parent.data_latency,
58 "The data access latency for this cache")
59
60 # Get the warmup percentage from the parent (cache)
61 warmup_percentage = Param.Percent(Parent.warmup_percentage,
62 "Percentage of tags to be touched to warm up the cache")
63
64 sequential_access = Param.Bool(Parent.sequential_access,
65 "Whether to access tags and data sequentially")
66
| 42
43class BaseTags(ClockedObject):
44 type = 'BaseTags'
45 abstract = True
46 cxx_header = "mem/cache/tags/base.hh"
47 # Get the size from the parent (cache)
48 size = Param.MemorySize(Parent.size, "capacity in bytes")
49
50 # Get the block size from the parent (system)
51 block_size = Param.Int(Parent.cache_line_size, "block size in bytes")
52
53 # Get the tag lookup latency from the parent (cache)
54 tag_latency = Param.Cycles(Parent.tag_latency,
55 "The tag lookup latency for this cache")
56
57 # Get the RAM access latency from the parent (cache)
58 data_latency = Param.Cycles(Parent.data_latency,
59 "The data access latency for this cache")
60
61 # Get the warmup percentage from the parent (cache)
62 warmup_percentage = Param.Percent(Parent.warmup_percentage,
63 "Percentage of tags to be touched to warm up the cache")
64
65 sequential_access = Param.Bool(Parent.sequential_access,
66 "Whether to access tags and data sequentially")
67
|
| 68 # Get indexing policy
69 indexing_policy = Param.BaseIndexingPolicy(SetAssociative(),
70 "Indexing policy")
71
72 # Set the indexing entry size as the block size
73 entry_size = Param.Int(Parent.cache_line_size,
74 "Indexing entry size in bytes")
75
|
67class BaseSetAssoc(BaseTags):
68 type = 'BaseSetAssoc'
69 cxx_header = "mem/cache/tags/base_set_assoc.hh"
70
71 # Get the cache associativity
72 assoc = Param.Int(Parent.assoc, "associativity")
73
74 # Get replacement policy from the parent (cache)
75 replacement_policy = Param.BaseReplacementPolicy(
76 Parent.replacement_policy, "Replacement policy")
77
78class SectorTags(BaseTags):
79 type = 'SectorTags'
80 cxx_header = "mem/cache/tags/sector_tags.hh"
81
82 # Get the cache associativity
83 assoc = Param.Int(Parent.assoc, "associativity")
84
85 # Number of sub-sectors (data blocks) per sector
86 num_blocks_per_sector = Param.Int(1, "Number of sub-sectors per sector");
87
| 76class BaseSetAssoc(BaseTags):
77 type = 'BaseSetAssoc'
78 cxx_header = "mem/cache/tags/base_set_assoc.hh"
79
80 # Get the cache associativity
81 assoc = Param.Int(Parent.assoc, "associativity")
82
83 # Get replacement policy from the parent (cache)
84 replacement_policy = Param.BaseReplacementPolicy(
85 Parent.replacement_policy, "Replacement policy")
86
87class SectorTags(BaseTags):
88 type = 'SectorTags'
89 cxx_header = "mem/cache/tags/sector_tags.hh"
90
91 # Get the cache associativity
92 assoc = Param.Int(Parent.assoc, "associativity")
93
94 # Number of sub-sectors (data blocks) per sector
95 num_blocks_per_sector = Param.Int(1, "Number of sub-sectors per sector");
96
|
| 97 # The indexing entry now is a sector block
98 entry_size = Parent.cache_line_size * Self.num_blocks_per_sector
99
|
88 # Get replacement policy from the parent (cache)
89 replacement_policy = Param.BaseReplacementPolicy(
90 Parent.replacement_policy, "Replacement policy")
91
92class FALRU(BaseTags):
93 type = 'FALRU'
94 cxx_class = 'FALRU'
95 cxx_header = "mem/cache/tags/fa_lru.hh"
96
97 min_tracked_cache_size = Param.MemorySize("128kB", "Minimum cache size for"
98 " which we track statistics")
| 100 # Get replacement policy from the parent (cache)
101 replacement_policy = Param.BaseReplacementPolicy(
102 Parent.replacement_policy, "Replacement policy")
103
104class FALRU(BaseTags):
105 type = 'FALRU'
106 cxx_class = 'FALRU'
107 cxx_header = "mem/cache/tags/fa_lru.hh"
108
109 min_tracked_cache_size = Param.MemorySize("128kB", "Minimum cache size for"
110 " which we track statistics")
|
99class SkewedAssoc(BaseSetAssoc):
100 type = 'SkewedAssoc'
101 cxx_header = "mem/cache/tags/skewed_assoc.hh"
| 111
112 # This tag uses its own embedded indexing
113 indexing_policy = NULL
|
| |