1/* |
2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * |
14 * Copyright (c) 2005 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright --- 42 unchanged lines hidden (view full) --- 64 static const int Max_Conf = INT_MAX; 65 static const int Min_Conf = INT_MIN; 66 67 class StrideEntry 68 { 69 public: 70 Addr instAddr; 71 Addr missAddr; |
72 bool isSecure; |
73 int stride; 74 int confidence; 75 }; 76 |
77 std::list<StrideEntry*> table[Max_Contexts]; 78 79 public: 80 81 StridePrefetcher(const Params *p) 82 : BasePrefetcher(p) 83 { 84 } 85 86 ~StridePrefetcher() {} 87 88 void calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses, 89 std::list<Cycles> &delays); 90}; 91 92#endif // __MEM_CACHE_PREFETCH_STRIDE_PREFETCHER_HH__ |