1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ron Dreslinski
41 */
42
43/**
44 * @file
45 * Describes a strided prefetcher.
46 */
47
48#ifndef __MEM_CACHE_PREFETCH_STRIDE_HH__
49#define __MEM_CACHE_PREFETCH_STRIDE_HH__
50
51#include <string>
52#include <unordered_map>
53#include <vector>
54
55#include "base/types.hh"
56#include "mem/cache/prefetch/queued.hh"
57#include "mem/packet.hh"
58
59struct StridePrefetcherParams;
60
61class StridePrefetcher : public QueuedPrefetcher
62{
63 protected:
64 const int maxConf;
65 const int threshConf;
66 const int minConf;
67 const int startConf;
68
69 const int pcTableAssoc;
70 const int pcTableSets;
71
72 const bool useMasterId;
73
74 const int degree;
75
76 struct StrideEntry
77 {
| 1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ron Dreslinski
41 */
42
43/**
44 * @file
45 * Describes a strided prefetcher.
46 */
47
48#ifndef __MEM_CACHE_PREFETCH_STRIDE_HH__
49#define __MEM_CACHE_PREFETCH_STRIDE_HH__
50
51#include <string>
52#include <unordered_map>
53#include <vector>
54
55#include "base/types.hh"
56#include "mem/cache/prefetch/queued.hh"
57#include "mem/packet.hh"
58
59struct StridePrefetcherParams;
60
61class StridePrefetcher : public QueuedPrefetcher
62{
63 protected:
64 const int maxConf;
65 const int threshConf;
66 const int minConf;
67 const int startConf;
68
69 const int pcTableAssoc;
70 const int pcTableSets;
71
72 const bool useMasterId;
73
74 const int degree;
75
76 struct StrideEntry
77 {
|
82 Addr instAddr;
83 Addr lastAddr;
84 bool isSecure;
85 int stride;
86 int confidence;
87 };
88
89 class PCTable
90 {
91 public:
92 /**
93 * Default constructor. Create a table with given parameters.
94 *
95 * @param assoc Associativity of the table.
96 * @param sets Number of sets in the table.
97 * @param name Name of the prefetcher.
98 */
99 PCTable(int assoc, int sets, const std::string name);
100
101 /**
102 * Default destructor.
103 */
104 ~PCTable();
105
106 /**
107 * Search for an entry in the pc table.
108 *
109 * @param pc The PC to look for.
110 * @param is_secure True if the target memory space is secure.
111 * @return Pointer to the entry.
112 */
113 StrideEntry* findEntry(Addr pc, bool is_secure);
114
115 /**
116 * Find a replacement victim to make room for given PC.
117 *
118 * @param pc The PC value.
119 * @return The victimized entry.
120 */
121 StrideEntry* findVictim(Addr pc);
122
123 private:
124 const std::string name() {return _name; }
125 const int pcTableAssoc;
126 const int pcTableSets;
127 const std::string _name;
128 std::vector<std::vector<StrideEntry>> entries;
129
130 /**
131 * PC hashing function to index sets in the table.
132 *
133 * @param pc The PC value.
134 * @return The set to which this PC maps.
135 */
136 Addr pcHash(Addr pc) const;
137 };
138 std::unordered_map<int, PCTable> pcTables;
139
140 /**
141 * Try to find a table of entries for the given context. If none is
142 * found, a new table is created.
143 *
144 * @param context The context to be searched for.
145 * @return The table corresponding to the given context.
146 */
147 PCTable* findTable(int context);
148
149 /**
150 * Create a PC table for the given context.
151 *
152 * @param context The context of the new PC table.
153 * @return The new PC table
154 */
155 PCTable* allocateNewContext(int context);
156
157 public:
158 StridePrefetcher(const StridePrefetcherParams *p);
159
160 void calculatePrefetch(const PacketPtr &pkt,
161 std::vector<AddrPriority> &addresses) override;
162};
163
164#endif // __MEM_CACHE_PREFETCH_STRIDE_HH__
| 84 Addr instAddr;
85 Addr lastAddr;
86 bool isSecure;
87 int stride;
88 int confidence;
89 };
90
91 class PCTable
92 {
93 public:
94 /**
95 * Default constructor. Create a table with given parameters.
96 *
97 * @param assoc Associativity of the table.
98 * @param sets Number of sets in the table.
99 * @param name Name of the prefetcher.
100 */
101 PCTable(int assoc, int sets, const std::string name);
102
103 /**
104 * Default destructor.
105 */
106 ~PCTable();
107
108 /**
109 * Search for an entry in the pc table.
110 *
111 * @param pc The PC to look for.
112 * @param is_secure True if the target memory space is secure.
113 * @return Pointer to the entry.
114 */
115 StrideEntry* findEntry(Addr pc, bool is_secure);
116
117 /**
118 * Find a replacement victim to make room for given PC.
119 *
120 * @param pc The PC value.
121 * @return The victimized entry.
122 */
123 StrideEntry* findVictim(Addr pc);
124
125 private:
126 const std::string name() {return _name; }
127 const int pcTableAssoc;
128 const int pcTableSets;
129 const std::string _name;
130 std::vector<std::vector<StrideEntry>> entries;
131
132 /**
133 * PC hashing function to index sets in the table.
134 *
135 * @param pc The PC value.
136 * @return The set to which this PC maps.
137 */
138 Addr pcHash(Addr pc) const;
139 };
140 std::unordered_map<int, PCTable> pcTables;
141
142 /**
143 * Try to find a table of entries for the given context. If none is
144 * found, a new table is created.
145 *
146 * @param context The context to be searched for.
147 * @return The table corresponding to the given context.
148 */
149 PCTable* findTable(int context);
150
151 /**
152 * Create a PC table for the given context.
153 *
154 * @param context The context of the new PC table.
155 * @return The new PC table
156 */
157 PCTable* allocateNewContext(int context);
158
159 public:
160 StridePrefetcher(const StridePrefetcherParams *p);
161
162 void calculatePrefetch(const PacketPtr &pkt,
163 std::vector<AddrPriority> &addresses) override;
164};
165
166#endif // __MEM_CACHE_PREFETCH_STRIDE_HH__
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