stride.cc (9288:3d6da8559605) | stride.cc (10028:fb8c44de891a) |
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1/* | 1/* |
2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * |
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2 * Copyright (c) 2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright --- 33 unchanged lines hidden (view full) --- 43 std::list<Cycles> &delays) 44{ 45 if (!pkt->req->hasPC()) { 46 DPRINTF(HWPrefetch, "ignoring request with no PC"); 47 return; 48 } 49 50 Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize-1); | 14 * Copyright (c) 2005 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright --- 33 unchanged lines hidden (view full) --- 55 std::list<Cycles> &delays) 56{ 57 if (!pkt->req->hasPC()) { 58 DPRINTF(HWPrefetch, "ignoring request with no PC"); 59 return; 60 } 61 62 Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize-1); |
63 bool is_secure = pkt->isSecure(); |
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51 MasterID master_id = useMasterId ? pkt->req->masterId() : 0; 52 Addr pc = pkt->req->getPC(); 53 assert(master_id < Max_Contexts); 54 std::list<StrideEntry*> &tab = table[master_id]; 55 56 /* Scan Table for instAddr Match */ 57 std::list<StrideEntry*>::iterator iter; 58 for (iter = tab.begin(); iter != tab.end(); iter++) { | 64 MasterID master_id = useMasterId ? pkt->req->masterId() : 0; 65 Addr pc = pkt->req->getPC(); 66 assert(master_id < Max_Contexts); 67 std::list<StrideEntry*> &tab = table[master_id]; 68 69 /* Scan Table for instAddr Match */ 70 std::list<StrideEntry*>::iterator iter; 71 for (iter = tab.begin(); iter != tab.end(); iter++) { |
59 if ((*iter)->instAddr == pc) | 72 // Entries have to match on the security state as well 73 if ((*iter)->instAddr == pc && (*iter)->isSecure == is_secure) |
60 break; 61 } 62 63 if (iter != tab.end()) { 64 // Hit in table 65 66 int new_stride = blk_addr - (*iter)->missAddr; 67 bool stride_match = (new_stride == (*iter)->stride); 68 69 if (stride_match && new_stride != 0) { 70 if ((*iter)->confidence < Max_Conf) 71 (*iter)->confidence++; 72 } else { 73 (*iter)->stride = new_stride; 74 if ((*iter)->confidence > Min_Conf) 75 (*iter)->confidence = 0; 76 } 77 | 74 break; 75 } 76 77 if (iter != tab.end()) { 78 // Hit in table 79 80 int new_stride = blk_addr - (*iter)->missAddr; 81 bool stride_match = (new_stride == (*iter)->stride); 82 83 if (stride_match && new_stride != 0) { 84 if ((*iter)->confidence < Max_Conf) 85 (*iter)->confidence++; 86 } else { 87 (*iter)->stride = new_stride; 88 if ((*iter)->confidence > Min_Conf) 89 (*iter)->confidence = 0; 90 } 91 |
78 DPRINTF(HWPrefetch, "hit: PC %x blk_addr %x stride %d (%s), conf %d\n", 79 pc, blk_addr, new_stride, stride_match ? "match" : "change", | 92 DPRINTF(HWPrefetch, "hit: PC %x blk_addr %x (%s) stride %d (%s), " 93 "conf %d\n", pc, blk_addr, is_secure ? "s" : "ns", new_stride, 94 stride_match ? "match" : "change", |
80 (*iter)->confidence); 81 82 (*iter)->missAddr = blk_addr; | 95 (*iter)->confidence); 96 97 (*iter)->missAddr = blk_addr; |
98 (*iter)->isSecure = is_secure; |
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83 84 if ((*iter)->confidence <= 0) 85 return; 86 87 for (int d = 1; d <= degree; d++) { 88 Addr new_addr = blk_addr + d * new_stride; 89 if (pageStop && !samePage(blk_addr, new_addr)) { 90 // Spanned the page, so now stop 91 pfSpanPage += degree - d + 1; 92 return; 93 } else { | 99 100 if ((*iter)->confidence <= 0) 101 return; 102 103 for (int d = 1; d <= degree; d++) { 104 Addr new_addr = blk_addr + d * new_stride; 105 if (pageStop && !samePage(blk_addr, new_addr)) { 106 // Spanned the page, so now stop 107 pfSpanPage += degree - d + 1; 108 return; 109 } else { |
94 DPRINTF(HWPrefetch, " queuing prefetch to %x @ %d\n", 95 new_addr, latency); | 110 DPRINTF(HWPrefetch, " queuing prefetch to %x (%s) @ %d\n", 111 new_addr, is_secure ? "s" : "ns", latency); |
96 addresses.push_back(new_addr); 97 delays.push_back(latency); 98 } 99 } 100 } else { 101 // Miss in table 102 // Find lowest confidence and replace 103 | 112 addresses.push_back(new_addr); 113 delays.push_back(latency); 114 } 115 } 116 } else { 117 // Miss in table 118 // Find lowest confidence and replace 119 |
104 DPRINTF(HWPrefetch, "miss: PC %x blk_addr %x\n", pc, blk_addr); | 120 DPRINTF(HWPrefetch, "miss: PC %x blk_addr %x (%s)\n", pc, blk_addr, 121 is_secure ? "s" : "ns"); |
105 106 if (tab.size() >= 256) { //set default table size is 256 107 std::list<StrideEntry*>::iterator min_pos = tab.begin(); 108 int min_conf = (*min_pos)->confidence; 109 for (iter = min_pos, ++iter; iter != tab.end(); ++iter) { 110 if ((*iter)->confidence < min_conf){ 111 min_pos = iter; 112 min_conf = (*iter)->confidence; 113 } 114 } | 122 123 if (tab.size() >= 256) { //set default table size is 256 124 std::list<StrideEntry*>::iterator min_pos = tab.begin(); 125 int min_conf = (*min_pos)->confidence; 126 for (iter = min_pos, ++iter; iter != tab.end(); ++iter) { 127 if ((*iter)->confidence < min_conf){ 128 min_pos = iter; 129 min_conf = (*iter)->confidence; 130 } 131 } |
115 DPRINTF(HWPrefetch, " replacing PC %x\n", (*min_pos)->instAddr); | 132 DPRINTF(HWPrefetch, " replacing PC %x (%s)\n", 133 (*min_pos)->instAddr, (*min_pos)->isSecure ? "s" : "ns"); |
116 117 // free entry and delete it 118 delete *min_pos; 119 tab.erase(min_pos); 120 } 121 122 StrideEntry *new_entry = new StrideEntry; 123 new_entry->instAddr = pc; 124 new_entry->missAddr = blk_addr; | 134 135 // free entry and delete it 136 delete *min_pos; 137 tab.erase(min_pos); 138 } 139 140 StrideEntry *new_entry = new StrideEntry; 141 new_entry->instAddr = pc; 142 new_entry->missAddr = blk_addr; |
143 new_entry->isSecure = is_secure; |
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125 new_entry->stride = 0; 126 new_entry->confidence = 0; 127 tab.push_back(new_entry); 128 } 129} 130 131 132StridePrefetcher* 133StridePrefetcherParams::create() 134{ 135 return new StridePrefetcher(this); 136} | 144 new_entry->stride = 0; 145 new_entry->confidence = 0; 146 tab.push_back(new_entry); 147 } 148} 149 150 151StridePrefetcher* 152StridePrefetcherParams::create() 153{ 154 return new StridePrefetcher(this); 155} |