stride.cc (10028:fb8c44de891a) | stride.cc (10052:5bb8e054456b) |
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1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 45 unchanged lines hidden (view full) --- 54StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses, 55 std::list<Cycles> &delays) 56{ 57 if (!pkt->req->hasPC()) { 58 DPRINTF(HWPrefetch, "ignoring request with no PC"); 59 return; 60 } 61 | 1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 45 unchanged lines hidden (view full) --- 54StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses, 55 std::list<Cycles> &delays) 56{ 57 if (!pkt->req->hasPC()) { 58 DPRINTF(HWPrefetch, "ignoring request with no PC"); 59 return; 60 } 61 |
62 Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize-1); | 62 Addr data_addr = pkt->getAddr(); |
63 bool is_secure = pkt->isSecure(); 64 MasterID master_id = useMasterId ? pkt->req->masterId() : 0; 65 Addr pc = pkt->req->getPC(); 66 assert(master_id < Max_Contexts); 67 std::list<StrideEntry*> &tab = table[master_id]; 68 69 /* Scan Table for instAddr Match */ 70 std::list<StrideEntry*>::iterator iter; 71 for (iter = tab.begin(); iter != tab.end(); iter++) { 72 // Entries have to match on the security state as well 73 if ((*iter)->instAddr == pc && (*iter)->isSecure == is_secure) 74 break; 75 } 76 77 if (iter != tab.end()) { 78 // Hit in table 79 | 63 bool is_secure = pkt->isSecure(); 64 MasterID master_id = useMasterId ? pkt->req->masterId() : 0; 65 Addr pc = pkt->req->getPC(); 66 assert(master_id < Max_Contexts); 67 std::list<StrideEntry*> &tab = table[master_id]; 68 69 /* Scan Table for instAddr Match */ 70 std::list<StrideEntry*>::iterator iter; 71 for (iter = tab.begin(); iter != tab.end(); iter++) { 72 // Entries have to match on the security state as well 73 if ((*iter)->instAddr == pc && (*iter)->isSecure == is_secure) 74 break; 75 } 76 77 if (iter != tab.end()) { 78 // Hit in table 79 |
80 int new_stride = blk_addr - (*iter)->missAddr; | 80 int new_stride = data_addr - (*iter)->missAddr; |
81 bool stride_match = (new_stride == (*iter)->stride); 82 83 if (stride_match && new_stride != 0) { 84 if ((*iter)->confidence < Max_Conf) 85 (*iter)->confidence++; 86 } else { 87 (*iter)->stride = new_stride; 88 if ((*iter)->confidence > Min_Conf) 89 (*iter)->confidence = 0; 90 } 91 | 81 bool stride_match = (new_stride == (*iter)->stride); 82 83 if (stride_match && new_stride != 0) { 84 if ((*iter)->confidence < Max_Conf) 85 (*iter)->confidence++; 86 } else { 87 (*iter)->stride = new_stride; 88 if ((*iter)->confidence > Min_Conf) 89 (*iter)->confidence = 0; 90 } 91 |
92 DPRINTF(HWPrefetch, "hit: PC %x blk_addr %x (%s) stride %d (%s), " 93 "conf %d\n", pc, blk_addr, is_secure ? "s" : "ns", new_stride, | 92 DPRINTF(HWPrefetch, "hit: PC %x data_addr %x (%s) stride %d (%s), " 93 "conf %d\n", pc, data_addr, is_secure ? "s" : "ns", new_stride, |
94 stride_match ? "match" : "change", 95 (*iter)->confidence); 96 | 94 stride_match ? "match" : "change", 95 (*iter)->confidence); 96 |
97 (*iter)->missAddr = blk_addr; | 97 (*iter)->missAddr = data_addr; |
98 (*iter)->isSecure = is_secure; 99 100 if ((*iter)->confidence <= 0) 101 return; 102 103 for (int d = 1; d <= degree; d++) { | 98 (*iter)->isSecure = is_secure; 99 100 if ((*iter)->confidence <= 0) 101 return; 102 103 for (int d = 1; d <= degree; d++) { |
104 Addr new_addr = blk_addr + d * new_stride; 105 if (pageStop && !samePage(blk_addr, new_addr)) { | 104 Addr new_addr = data_addr + d * new_stride; 105 if (pageStop && !samePage(data_addr, new_addr)) { |
106 // Spanned the page, so now stop 107 pfSpanPage += degree - d + 1; 108 return; 109 } else { 110 DPRINTF(HWPrefetch, " queuing prefetch to %x (%s) @ %d\n", 111 new_addr, is_secure ? "s" : "ns", latency); 112 addresses.push_back(new_addr); 113 delays.push_back(latency); 114 } 115 } 116 } else { 117 // Miss in table 118 // Find lowest confidence and replace 119 | 106 // Spanned the page, so now stop 107 pfSpanPage += degree - d + 1; 108 return; 109 } else { 110 DPRINTF(HWPrefetch, " queuing prefetch to %x (%s) @ %d\n", 111 new_addr, is_secure ? "s" : "ns", latency); 112 addresses.push_back(new_addr); 113 delays.push_back(latency); 114 } 115 } 116 } else { 117 // Miss in table 118 // Find lowest confidence and replace 119 |
120 DPRINTF(HWPrefetch, "miss: PC %x blk_addr %x (%s)\n", pc, blk_addr, | 120 DPRINTF(HWPrefetch, "miss: PC %x data_addr %x (%s)\n", pc, data_addr, |
121 is_secure ? "s" : "ns"); 122 123 if (tab.size() >= 256) { //set default table size is 256 124 std::list<StrideEntry*>::iterator min_pos = tab.begin(); 125 int min_conf = (*min_pos)->confidence; 126 for (iter = min_pos, ++iter; iter != tab.end(); ++iter) { 127 if ((*iter)->confidence < min_conf){ 128 min_pos = iter; --- 5 unchanged lines hidden (view full) --- 134 135 // free entry and delete it 136 delete *min_pos; 137 tab.erase(min_pos); 138 } 139 140 StrideEntry *new_entry = new StrideEntry; 141 new_entry->instAddr = pc; | 121 is_secure ? "s" : "ns"); 122 123 if (tab.size() >= 256) { //set default table size is 256 124 std::list<StrideEntry*>::iterator min_pos = tab.begin(); 125 int min_conf = (*min_pos)->confidence; 126 for (iter = min_pos, ++iter; iter != tab.end(); ++iter) { 127 if ((*iter)->confidence < min_conf){ 128 min_pos = iter; --- 5 unchanged lines hidden (view full) --- 134 135 // free entry and delete it 136 delete *min_pos; 137 tab.erase(min_pos); 138 } 139 140 StrideEntry *new_entry = new StrideEntry; 141 new_entry->instAddr = pc; |
142 new_entry->missAddr = blk_addr; | 142 new_entry->missAddr = data_addr; |
143 new_entry->isSecure = is_secure; 144 new_entry->stride = 0; 145 new_entry->confidence = 0; 146 tab.push_back(new_entry); 147 } 148} 149 150 151StridePrefetcher* 152StridePrefetcherParams::create() 153{ 154 return new StridePrefetcher(this); 155} | 143 new_entry->isSecure = is_secure; 144 new_entry->stride = 0; 145 new_entry->confidence = 0; 146 tab.push_back(new_entry); 147 } 148} 149 150 151StridePrefetcher* 152StridePrefetcherParams::create() 153{ 154 return new StridePrefetcher(this); 155} |