1/*
2 * Copyright (c) 2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Steve Reinhardt
30 */
31
32/**
33 * @file
34 * Stride Prefetcher template instantiations.
35 */
36
37#include "base/trace.hh"
| 1/*
2 * Copyright (c) 2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Steve Reinhardt
30 */
31
32/**
33 * @file
34 * Stride Prefetcher template instantiations.
35 */
36
37#include "base/trace.hh"
|
38#include "mem/cache/prefetch/stride.hh"
39
40void
41StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
42 std::list<Tick> &delays)
43{
44 if (!pkt->req->hasPC()) {
45 DPRINTF(HWPrefetch, "ignoring request with no PC");
46 return;
47 }
48
49 if (useContextId && !pkt->req->hasContextId()) {
50 DPRINTF(HWPrefetch, "ignoring request with no context ID");
51 return;
52 }
53
54 Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize-1);
55 int ctx_id = useContextId ? pkt->req->contextId() : 0;
56 Addr pc = pkt->req->getPC();
57 assert(ctx_id < Max_Contexts);
58 std::list<StrideEntry*> &tab = table[ctx_id];
59
60 /* Scan Table for instAddr Match */
61 std::list<StrideEntry*>::iterator iter;
62 for (iter = tab.begin(); iter != tab.end(); iter++) {
63 if ((*iter)->instAddr == pc)
64 break;
65 }
66
67 if (iter != tab.end()) {
68 // Hit in table
69
70 int new_stride = blk_addr - (*iter)->missAddr;
71 bool stride_match = (new_stride == (*iter)->stride);
72
73 if (stride_match && new_stride != 0) {
74 if ((*iter)->confidence < Max_Conf)
75 (*iter)->confidence++;
76 } else {
77 (*iter)->stride = new_stride;
78 if ((*iter)->confidence > Min_Conf)
79 (*iter)->confidence = 0;
80 }
81
82 DPRINTF(HWPrefetch, "hit: PC %x blk_addr %x stride %d (%s), conf %d\n",
83 pc, blk_addr, new_stride, stride_match ? "match" : "change",
84 (*iter)->confidence);
85
86 (*iter)->missAddr = blk_addr;
87
88 if ((*iter)->confidence <= 0)
89 return;
90
91 for (int d = 1; d <= degree; d++) {
92 Addr new_addr = blk_addr + d * new_stride;
93 if (pageStop && !samePage(blk_addr, new_addr)) {
94 // Spanned the page, so now stop
95 pfSpanPage += degree - d + 1;
96 return;
97 } else {
98 DPRINTF(HWPrefetch, " queuing prefetch to %x @ %d\n",
99 new_addr, latency);
100 addresses.push_back(new_addr);
101 delays.push_back(latency);
102 }
103 }
104 } else {
105 // Miss in table
106 // Find lowest confidence and replace
107
108 DPRINTF(HWPrefetch, "miss: PC %x blk_addr %x\n", pc, blk_addr);
109
110 if (tab.size() >= 256) { //set default table size is 256
111 std::list<StrideEntry*>::iterator min_pos = tab.begin();
112 int min_conf = (*min_pos)->confidence;
113 for (iter = min_pos, ++iter; iter != tab.end(); ++iter) {
114 if ((*iter)->confidence < min_conf){
115 min_pos = iter;
116 min_conf = (*iter)->confidence;
117 }
118 }
119 DPRINTF(HWPrefetch, " replacing PC %x\n", (*min_pos)->instAddr);
120 tab.erase(min_pos);
121 }
122
123 StrideEntry *new_entry = new StrideEntry;
124 new_entry->instAddr = pc;
125 new_entry->missAddr = blk_addr;
126 new_entry->stride = 0;
127 new_entry->confidence = 0;
128 tab.push_back(new_entry);
129 }
130}
| 39#include "mem/cache/prefetch/stride.hh"
40
41void
42StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
43 std::list<Tick> &delays)
44{
45 if (!pkt->req->hasPC()) {
46 DPRINTF(HWPrefetch, "ignoring request with no PC");
47 return;
48 }
49
50 if (useContextId && !pkt->req->hasContextId()) {
51 DPRINTF(HWPrefetch, "ignoring request with no context ID");
52 return;
53 }
54
55 Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize-1);
56 int ctx_id = useContextId ? pkt->req->contextId() : 0;
57 Addr pc = pkt->req->getPC();
58 assert(ctx_id < Max_Contexts);
59 std::list<StrideEntry*> &tab = table[ctx_id];
60
61 /* Scan Table for instAddr Match */
62 std::list<StrideEntry*>::iterator iter;
63 for (iter = tab.begin(); iter != tab.end(); iter++) {
64 if ((*iter)->instAddr == pc)
65 break;
66 }
67
68 if (iter != tab.end()) {
69 // Hit in table
70
71 int new_stride = blk_addr - (*iter)->missAddr;
72 bool stride_match = (new_stride == (*iter)->stride);
73
74 if (stride_match && new_stride != 0) {
75 if ((*iter)->confidence < Max_Conf)
76 (*iter)->confidence++;
77 } else {
78 (*iter)->stride = new_stride;
79 if ((*iter)->confidence > Min_Conf)
80 (*iter)->confidence = 0;
81 }
82
83 DPRINTF(HWPrefetch, "hit: PC %x blk_addr %x stride %d (%s), conf %d\n",
84 pc, blk_addr, new_stride, stride_match ? "match" : "change",
85 (*iter)->confidence);
86
87 (*iter)->missAddr = blk_addr;
88
89 if ((*iter)->confidence <= 0)
90 return;
91
92 for (int d = 1; d <= degree; d++) {
93 Addr new_addr = blk_addr + d * new_stride;
94 if (pageStop && !samePage(blk_addr, new_addr)) {
95 // Spanned the page, so now stop
96 pfSpanPage += degree - d + 1;
97 return;
98 } else {
99 DPRINTF(HWPrefetch, " queuing prefetch to %x @ %d\n",
100 new_addr, latency);
101 addresses.push_back(new_addr);
102 delays.push_back(latency);
103 }
104 }
105 } else {
106 // Miss in table
107 // Find lowest confidence and replace
108
109 DPRINTF(HWPrefetch, "miss: PC %x blk_addr %x\n", pc, blk_addr);
110
111 if (tab.size() >= 256) { //set default table size is 256
112 std::list<StrideEntry*>::iterator min_pos = tab.begin();
113 int min_conf = (*min_pos)->confidence;
114 for (iter = min_pos, ++iter; iter != tab.end(); ++iter) {
115 if ((*iter)->confidence < min_conf){
116 min_pos = iter;
117 min_conf = (*iter)->confidence;
118 }
119 }
120 DPRINTF(HWPrefetch, " replacing PC %x\n", (*min_pos)->instAddr);
121 tab.erase(min_pos);
122 }
123
124 StrideEntry *new_entry = new StrideEntry;
125 new_entry->instAddr = pc;
126 new_entry->missAddr = blk_addr;
127 new_entry->stride = 0;
128 new_entry->confidence = 0;
129 tab.push_back(new_entry);
130 }
131}
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