stride.cc (13425:00abf35b2f7e) | stride.cc (13426:d2b0e9ec67f1) |
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1/* 2 * Copyright (c) 2012-2013, 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 43 unchanged lines hidden (view full) --- 52 53#include "base/intmath.hh" 54#include "base/logging.hh" 55#include "base/random.hh" 56#include "base/trace.hh" 57#include "debug/HWPrefetch.hh" 58#include "params/StridePrefetcher.hh" 59 | 1/* 2 * Copyright (c) 2012-2013, 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 43 unchanged lines hidden (view full) --- 52 53#include "base/intmath.hh" 54#include "base/logging.hh" 55#include "base/random.hh" 56#include "base/trace.hh" 57#include "debug/HWPrefetch.hh" 58#include "params/StridePrefetcher.hh" 59 |
60StridePrefetcher::StrideEntry::StrideEntry() 61{ 62 invalidate(); 63} 64 65void 66StridePrefetcher::StrideEntry::invalidate() 67{ 68 instAddr = 0; 69 lastAddr = 0; 70 isSecure = false; 71 stride = 0; 72 confidence = 0; 73} 74 |
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60StridePrefetcher::StridePrefetcher(const StridePrefetcherParams *p) 61 : QueuedPrefetcher(p), 62 maxConf(p->max_conf), 63 threshConf(p->thresh_conf), 64 minConf(p->min_conf), 65 startConf(p->start_conf), 66 pcTableAssoc(p->table_assoc), 67 pcTableSets(p->table_sets), --- 109 unchanged lines hidden (view full) --- 177 } 178 } 179 } else { 180 // Miss in table 181 DPRINTF(HWPrefetch, "Miss: PC %x pkt_addr %x (%s)\n", pc, pkt_addr, 182 is_secure ? "s" : "ns"); 183 184 StrideEntry* entry = pcTable->findVictim(pc); | 75StridePrefetcher::StridePrefetcher(const StridePrefetcherParams *p) 76 : QueuedPrefetcher(p), 77 maxConf(p->max_conf), 78 threshConf(p->thresh_conf), 79 minConf(p->min_conf), 80 startConf(p->start_conf), 81 pcTableAssoc(p->table_assoc), 82 pcTableSets(p->table_sets), --- 109 unchanged lines hidden (view full) --- 192 } 193 } 194 } else { 195 // Miss in table 196 DPRINTF(HWPrefetch, "Miss: PC %x pkt_addr %x (%s)\n", pc, pkt_addr, 197 is_secure ? "s" : "ns"); 198 199 StrideEntry* entry = pcTable->findVictim(pc); |
200 201 // Invalidate victim 202 entry->invalidate(); 203 204 // Insert new entry's data |
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185 entry->instAddr = pc; 186 entry->lastAddr = pkt_addr; 187 entry->isSecure= is_secure; | 205 entry->instAddr = pc; 206 entry->lastAddr = pkt_addr; 207 entry->isSecure= is_secure; |
188 entry->stride = 0; | |
189 entry->confidence = startConf; 190 } 191} 192 193inline Addr 194StridePrefetcher::PCTable::pcHash(Addr pc) const 195{ 196 Addr hash1 = pc >> 1; --- 36 unchanged lines hidden --- | 208 entry->confidence = startConf; 209 } 210} 211 212inline Addr 213StridePrefetcher::PCTable::pcHash(Addr pc) const 214{ 215 Addr hash1 = pc >> 1; --- 36 unchanged lines hidden --- |