base.hh (10623:b9646f4546ad) | base.hh (11438:3c9fd319a982) |
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1/* 2 * Copyright (c) 2013-2014 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 54 unchanged lines hidden (view full) --- 63 // PARAMETERS 64 65 /** Pointr to the parent cache. */ 66 BaseCache* cache; 67 68 /** The block size of the parent cache. */ 69 unsigned blkSize; 70 | 1/* 2 * Copyright (c) 2013-2014 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 54 unchanged lines hidden (view full) --- 63 // PARAMETERS 64 65 /** Pointr to the parent cache. */ 66 BaseCache* cache; 67 68 /** The block size of the parent cache. */ 69 unsigned blkSize; 70 |
71 /** log_2(block size of the parent cache). */ 72 unsigned lBlkSize; 73 |
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71 /** System we belong to */ 72 System* system; 73 74 /** Only consult prefetcher on cache misses? */ 75 bool onMiss; 76 77 /** Consult prefetcher on reads? */ 78 bool onRead; --- 18 unchanged lines hidden (view full) --- 97 /** Determine if address is in cache */ 98 bool inCache(Addr addr, bool is_secure) const; 99 100 /** Determine if address is in cache miss queue */ 101 bool inMissQueue(Addr addr, bool is_secure) const; 102 103 /** Determine if addresses are on the same page */ 104 bool samePage(Addr a, Addr b) const; | 74 /** System we belong to */ 75 System* system; 76 77 /** Only consult prefetcher on cache misses? */ 78 bool onMiss; 79 80 /** Consult prefetcher on reads? */ 81 bool onRead; --- 18 unchanged lines hidden (view full) --- 100 /** Determine if address is in cache */ 101 bool inCache(Addr addr, bool is_secure) const; 102 103 /** Determine if address is in cache miss queue */ 104 bool inMissQueue(Addr addr, bool is_secure) const; 105 106 /** Determine if addresses are on the same page */ 107 bool samePage(Addr a, Addr b) const; |
108 /** Determine the address of the block in which a lays */ 109 Addr blockAddress(Addr a) const; 110 /** Determine the address of a at block granularity */ 111 Addr blockIndex(Addr a) const; 112 /** Determine the address of the page in which a lays */ 113 Addr pageAddress(Addr a) const; 114 /** Determine the page-offset of a */ 115 Addr pageOffset(Addr a) const; 116 /** Build the address of the i-th block inside the page */ 117 Addr pageIthBlockAddress(Addr page, uint32_t i) const; |
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106 Stats::Scalar pfIssued; 107 108 public: 109 110 BasePrefetcher(const BasePrefetcherParams *p); 111 112 virtual ~BasePrefetcher() {} 113 --- 16 unchanged lines hidden --- | 120 Stats::Scalar pfIssued; 121 122 public: 123 124 BasePrefetcher(const BasePrefetcherParams *p); 125 126 virtual ~BasePrefetcher() {} 127 --- 16 unchanged lines hidden --- |