base.cc (13434:99807b35a66c) base.cc (13551:f352df8e2863)
1/*
2 * Copyright (c) 2013-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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51#include <cassert>
52
53#include "base/intmath.hh"
54#include "cpu/base.hh"
55#include "mem/cache/base.hh"
56#include "params/BasePrefetcher.hh"
57#include "sim/system.hh"
58
1/*
2 * Copyright (c) 2013-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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51#include <cassert>
52
53#include "base/intmath.hh"
54#include "cpu/base.hh"
55#include "mem/cache/base.hh"
56#include "params/BasePrefetcher.hh"
57#include "sim/system.hh"
58
59BasePrefetcher::PrefetchInfo::PrefetchInfo(PacketPtr pkt, Addr addr)
60 : address(addr), pc(pkt->req->hasPC() ? pkt->req->getPC() : 0),
61 masterId(pkt->req->masterId()), validPC(pkt->req->hasPC()),
62 secure(pkt->isSecure())
63{
64}
65
66BasePrefetcher::PrefetchInfo::PrefetchInfo(PrefetchInfo const &pfi, Addr addr)
67 : address(addr), pc(pfi.pc), masterId(pfi.masterId), validPC(pfi.validPC),
68 secure(pfi.secure)
69{
70}
71
59void
60BasePrefetcher::PrefetchListener::notify(const PacketPtr &pkt)
61{
62 parent.probeNotify(pkt);
63}
64
65BasePrefetcher::BasePrefetcher(const BasePrefetcherParams *p)
66 : ClockedObject(p), listeners(), cache(nullptr), blkSize(p->block_size),
67 lBlkSize(floorLog2(blkSize)), onMiss(p->on_miss), onRead(p->on_read),
68 onWrite(p->on_write), onData(p->on_data), onInst(p->on_inst),
69 masterId(p->sys->getMasterId(this)), pageBytes(p->sys->getPageBytes()),
72void
73BasePrefetcher::PrefetchListener::notify(const PacketPtr &pkt)
74{
75 parent.probeNotify(pkt);
76}
77
78BasePrefetcher::BasePrefetcher(const BasePrefetcherParams *p)
79 : ClockedObject(p), listeners(), cache(nullptr), blkSize(p->block_size),
80 lBlkSize(floorLog2(blkSize)), onMiss(p->on_miss), onRead(p->on_read),
81 onWrite(p->on_write), onData(p->on_data), onInst(p->on_inst),
82 masterId(p->sys->getMasterId(this)), pageBytes(p->sys->getPageBytes()),
70 prefetchOnAccess(p->prefetch_on_access)
83 prefetchOnAccess(p->prefetch_on_access),
84 useVirtualAddresses(p->use_virtual_addresses)
71{
72}
73
74void
75BasePrefetcher::setCache(BaseCache *_cache)
76{
77 assert(!cache);
78 cache = _cache;

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170void
171BasePrefetcher::probeNotify(const PacketPtr &pkt)
172{
173 // Don't notify prefetcher on SWPrefetch, cache maintenance
174 // operations or for writes that we are coaslescing.
175 if (pkt->cmd.isSWPrefetch()) return;
176 if (pkt->req->isCacheMaintenance()) return;
177 if (pkt->isWrite() && cache != nullptr && cache->coalesce()) return;
85{
86}
87
88void
89BasePrefetcher::setCache(BaseCache *_cache)
90{
91 assert(!cache);
92 cache = _cache;

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184void
185BasePrefetcher::probeNotify(const PacketPtr &pkt)
186{
187 // Don't notify prefetcher on SWPrefetch, cache maintenance
188 // operations or for writes that we are coaslescing.
189 if (pkt->cmd.isSWPrefetch()) return;
190 if (pkt->req->isCacheMaintenance()) return;
191 if (pkt->isWrite() && cache != nullptr && cache->coalesce()) return;
178 notify(pkt);
192
193 // Verify this access type is observed by prefetcher
194 if (observeAccess(pkt)) {
195 if (useVirtualAddresses && pkt->req->hasVaddr()) {
196 PrefetchInfo pfi(pkt, pkt->req->getVaddr());
197 notify(pkt, pfi);
198 } else if (!useVirtualAddresses && pkt->req->hasPaddr()) {
199 PrefetchInfo pfi(pkt, pkt->req->getPaddr());
200 notify(pkt, pfi);
201 }
202 }
179}
180
181void
182BasePrefetcher::regProbeListeners()
183{
184 /**
185 * If no probes were added by the configuration scripts, connect to the
186 * parent cache using the probe "Miss". Also connect to "Hit", if the

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204
205void
206BasePrefetcher::regProbeListeners()
207{
208 /**
209 * If no probes were added by the configuration scripts, connect to the
210 * parent cache using the probe "Miss". Also connect to "Hit", if the

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