base.cc (10883:9294c4a60251) base.cc (11438:3c9fd319a982)
1/*
2 * Copyright (c) 2013-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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43
44/**
45 * @file
46 * Hardware Prefetcher Definition.
47 */
48
49#include <list>
50
1/*
2 * Copyright (c) 2013-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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43
44/**
45 * @file
46 * Hardware Prefetcher Definition.
47 */
48
49#include <list>
50
51#include "base/intmath.hh"
51#include "mem/cache/prefetch/base.hh"
52#include "mem/cache/base.hh"
53#include "sim/system.hh"
54
55BasePrefetcher::BasePrefetcher(const BasePrefetcherParams *p)
52#include "mem/cache/prefetch/base.hh"
53#include "mem/cache/base.hh"
54#include "sim/system.hh"
55
56BasePrefetcher::BasePrefetcher(const BasePrefetcherParams *p)
56 : ClockedObject(p), cache(nullptr), blkSize(0), system(p->sys),
57 onMiss(p->on_miss), onRead(p->on_read),
57 : ClockedObject(p), cache(nullptr), blkSize(0), lBlkSize(0),
58 system(p->sys), onMiss(p->on_miss), onRead(p->on_read),
58 onWrite(p->on_write), onData(p->on_data), onInst(p->on_inst),
59 masterId(system->getMasterId(name())),
60 pageBytes(system->getPageBytes())
61{
62}
63
64void
65BasePrefetcher::setCache(BaseCache *_cache)
66{
67 assert(!cache);
68 cache = _cache;
69 blkSize = cache->getBlockSize();
59 onWrite(p->on_write), onData(p->on_data), onInst(p->on_inst),
60 masterId(system->getMasterId(name())),
61 pageBytes(system->getPageBytes())
62{
63}
64
65void
66BasePrefetcher::setCache(BaseCache *_cache)
67{
68 assert(!cache);
69 cache = _cache;
70 blkSize = cache->getBlockSize();
71 lBlkSize = floorLog2(blkSize);
70}
71
72void
73BasePrefetcher::regStats()
74{
75 pfIssued
76 .name(name() + ".num_hwpf_issued")
77 .desc("number of hwpf issued")
78 ;
72}
73
74void
75BasePrefetcher::regStats()
76{
77 pfIssued
78 .name(name() + ".num_hwpf_issued")
79 .desc("number of hwpf issued")
80 ;
81
79}
80
81bool
82BasePrefetcher::observeAccess(const PacketPtr &pkt) const
83{
84 Addr addr = pkt->getAddr();
85 bool fetch = pkt->req->isInstFetch();
86 bool read = pkt->isRead();

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122}
123
124bool
125BasePrefetcher::samePage(Addr a, Addr b) const
126{
127 return roundDown(a, pageBytes) == roundDown(b, pageBytes);
128}
129
82}
83
84bool
85BasePrefetcher::observeAccess(const PacketPtr &pkt) const
86{
87 Addr addr = pkt->getAddr();
88 bool fetch = pkt->req->isInstFetch();
89 bool read = pkt->isRead();

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125}
126
127bool
128BasePrefetcher::samePage(Addr a, Addr b) const
129{
130 return roundDown(a, pageBytes) == roundDown(b, pageBytes);
131}
132
133Addr
134BasePrefetcher::blockAddress(Addr a) const
135{
136 return a & ~(blkSize-1);
137}
130
138
139Addr
140BasePrefetcher::blockIndex(Addr a) const
141{
142 return a >> lBlkSize;
143}
144
145Addr
146BasePrefetcher::pageAddress(Addr a) const
147{
148 return roundDown(a, pageBytes);
149}
150
151Addr
152BasePrefetcher::pageOffset(Addr a) const
153{
154 return a & (pageBytes - 1);
155}
156
157Addr
158BasePrefetcher::pageIthBlockAddress(Addr page, uint32_t blockIndex) const
159{
160 return page + (blockIndex << lBlkSize);
161}